Globalfoundries Singapore Pte. Ltd.

Shifeng Zhao

Juan Boon Tan

Soh Yun Siah

Tze Ho Simon Chan

Yang Hong

Francis YongWee Poh

Haifeng Sheng

Integrated circuits and methods of forming the same are provided herein. In an embodiment, an integrated circuit includes a semiconductor substrate that has an isolated well. A multilayer metallization stack overlies the semiconductor substrate. The multilayer metallization stack includes a metal layer, a functional via, and a dummy metal feature. The metal layer includes a first line in electrical communication with the isolated well through a contact. The functional via is in electrical communication with the first line and the contact. The dummy metal feature is in electrical communication with the functional via.

Integrated circuits including a dummy metal feature and methods of forming the same

Disclosed herein are memory cell arrays, semiconductor devices, and methods for fabricating semiconductor devices. In one embodiment, a memory cell array includes first, second, third, and fourth memory cells each having a first transistor and a second transistor. First and second word-lines are coupled with the gates of the first transistors of the first and second memory cells. The second and a third word-line are coupled with the gates of the second transistors of the third and fourth memory cells.

Non-volatile memory cell arrays and methods of fabricating semiconductor devices

Growing community of inventors

Singapore, Singapore

Shifeng Zhao