Taiwan Semiconductor Manufacturing Comp. Ltd.

Mediatek Corporation

Shi-Wei Chang

Hong-Chen Cheng

Jhon-Jhy Liaw

Li-Chun Tien

Cheng Hung Lee

Kuo-Hua Pan

Chia-Wei Wang

Chien-Chi Tien

Chi-Kai Hsieh

Hektor Huang

An embodiment of the invention provides an integrated circuit including a core circuit and a memory. The core circuit executes operations of the integrated circuit. The memory stores a subsystem and a repair system. When the repair system runs, the repair system detects whether there is a defect in the memory. When the repair system detects the defect, the repair system repairs the defect, and when the repair system does not detect the defect, a fake defect is injected in the memory to verify whether the repair system runs correctly.

Integrated circuits with built-in self test mechanism

A semiconductor memory cell array is disclosed that includes a memory cell unit. The memory cell unit includes an active region, a first transistor, a second transistor, a gate structure, and an interconnect. The first transistor and the second transistor are formed on the active region. The gate structure is formed on the active region and between the first transistor and the second transistor. The interconnect connects the gate structure and at least one of sources of the first transistor and the second transistor to a power line.

Memory cell array

The present disclosure relates to a differential sense amplifier comprising first and second cross-coupled inverters with first and second complimentary storage nodes. A first current control element changes a current through the first cross-coupled inverter based upon an output of a second cross-coupled inverter, and a second current control element changes a current through the second cross-coupled inverter based upon an output of the first cross-coupled inverter. Other devices and methods are also disclosed.

Sense amplifier

Growing community of inventors

Hsinchu, Taiwan

Shi-Wei Chang