Qualcomm Incorporated

Broadcom Corporation

Sherif Galal

Subbarao Surendra Chakkirala

Todd Lee Brooks

Earl Schreyer

Xinwang Zhang

Khaled Abdelfattah

Kshitij Yadav

Alex Jianzhong Chen

Venugopal Gopinathan

Jingxue Lu

Ramkumar Sivakumar

Dongyang Tang

Pradeep Charles Silva

ChienChung Yang

Hui-Ya Liao Nelson

Sang-Uk Ryu

Khaled Mahmoud Abdelfattah Aly

Qubo Zhou

Iuri Mehr

Xin Fan

Shreyas Srikanth Payal

Tay Hui Zheng

Apparatus and techniques for adaptively adjusting an input current limit for a boost converter supplying power to a load, such as an amplifier. An example circuit for supplying power generally includes a boost converter having an output coupled to a load, and logic configured to adaptively adjust an input current limit for the boost converter based on an estimated output power for the boost converter and to apply the input current limit to the boost converter. One example method for supplying power generally includes converting an input voltage to an output voltage with a boost converter, to power a load for the boost converter, adaptively adjusting an input current limit for the boost converter based on an estimated output power for the boost converter, and applying the input current limit to the boost converter during the converting.

Adaptively adjusting an input current limit for a boost converter

A method includes receiving first data associated with a first power amplifier and second data associated with a second power amplifier. The method also includes generating a first amplitude limiting signal having gain parameters that are based on the first data and the second data. The first data includes at least one of a temperature measurement associated with the first power amplifier, a supply voltage measurement associated with the first power amplifier, a load resistance associated with the first power amplifier, or a gain associated with the first power amplifier. The method further includes modifying an audio signal based at least in part on the first amplitude limiting signal to generate a first gain-adjusted audio signal. The method also includes providing a first output audio signal to the first power amplifier for amplification. The first output audio signal is based at least in part on the first gain-adjusted audio signal.

Power amplifier management

Aspects of the present disclosure relate to apparatus and methods for dynamically adjusting the common-mode input signal of a power amplifier, such as a class-D power amplifier. One example power amplifier circuit generally includes a first amplifier having a signal input and a power input; and a common-mode adjustment circuit having a first input coupled to the power input of the first amplifier, having an output coupled to the signal input of the first amplifier, and being configured to generate a common-mode signal to apply to the signal input of the first amplifier, based on a power supply voltage on the power input of the first amplifier.

Dynamic common-mode adjustment for power amplifiers

Certain aspects of the present disclosure are generally directed to circuitry and techniques for voltage-to-current conversion. For example, certain aspects provide a circuit for signal amplification including a first amplifier; a first transistor, a gate of the first transistor being coupled to an output of the first amplifier and a drain of the first transistor being coupled to an output node of circuit; a first resistive element coupled between a first input node of the circuit and an input of the first amplifier; a second amplifier; a second transistor, a gate of the second transistor being coupled to an output of the second amplifier and a drain of the second transistor being coupled to the output node of circuit; and a second resistive element coupled between a second input node of the circuit and an input of the second amplifier.

Voltage-to-current architecture and error

A hybrid class-H/predictive class-G switching amplifier architecture and techniques for amplifying a signal (e.g., an audio signal) using such an architecture. One example method of amplification generally includes delaying an input signal to generate a delayed version of the input signal, amplifying the delayed version of the input signal with an amplifier powered by a boost converter, and selectively controlling the boost converter to operate in at least one of a predictive class-G mode or a class-H mode, based on a magnitude of the input signal.

Hybrid class-H/predictive class-G switching amplifier architecture

A class-D amplifier including a pulse width modulator including an input configured to receive a first signal based on an input signal, and an output configured to generate a pulse width modulated (PWM) signal; an H-bridge including an input coupled to an output of the pulse width modulator and an output coupled to a load, wherein the H-bridge is configured to generate an output signal across the load based on the PWM signal; and a deadtime compensation circuit coupled to the H-bridge, wherein the deadtime compensation circuit is configured to compensate for deadtime distortion in the output signal. The deadtime compensation circuit may be a feedback circuit between an output of the H-bridge and an input of the pulse width modulator, a pulse modification circuit at the output of the pulse width modulator, or an offset signal generating circuit providing an offset signal to the pulse width modulator.

Class-D amplifier with deadtime distortion compensation

Voltage-to-current architecture and error correction schemes

Certain aspects of the present disclosure provide a power supply circuit. The power supply circuit generally includes: a switched-mode power supply (SMPS) having an inductive element and a first switch coupled to the inductive element; a feedback path coupled between an output of the SMPS and a control input of the first switch; and a current limit circuit comprising a first capacitive element, a charge circuit coupled to the first capacitive element, a first current source, a first resistive element coupled to the first current source, the capacitive element being coupled to a node between the resistive element and the first current source, a sample-and-hold circuit coupled to the first capacitive element, and a clamp circuit coupled between the sample-and-hold circuit and the feedback path.

Current limiting for a boost converter

Certain aspects of the present disclosure are generally directed to circuitry and techniques for current sensing. For example, certain aspects provide a circuit for signal amplification including a first amplifier, a second amplifier, and a third amplifier. The circuit also includes a first capacitive element coupled between a first output of the first amplifier and a first input of the third amplifier, a second capacitive element coupled between a second output of the first amplifier and a second input of the third amplifier, a third capacitive element coupled between a first output of the second amplifier and the first input of the third amplifier, and a fourth capacitive element coupled between a second output of the second amplifier and the second input of the third amplifier.

Enhancing speaker protection accuracy

In certain aspects, a clamp circuit includes a first current mirror having a first branch and a second branch, wherein the first current mirror is configured to mirror a current flowing through the first branch of the first current mirror to the second branch of the first current mirror. The clamp circuit also includes a second current mirror having a first branch and a second branch, wherein the second current mirror is configured to mirror a current flowing through the first branch of the second current mirror to the second branch of the second current mirror. The first branch of the first current mirror is coupled in series with the second branch of the second current mirror, and the second branch of the first current mirror is coupled in series with the first branch of the second current mirror.

Clamp circuit

A level shifter includes a compact bias generator. The compact bias generator generates a first bias signal and a second bias signal, in the absence of a buffer. The level shifter also includes a first latch in a first stage to translate a first voltage to a second voltage based on the first bias signal. The level shifter further includes a second latch in a second stage to translate the first voltage to a third voltage based on the second bias signal. The first bias signal is independent of the second bias signal.

Pre-drive level shifter with compact bias generator

In certain aspects, a delay circuit includes a multiplexer, a first delay path coupled between an input of the delay circuit and a first input of the multiplexer, and a second delay path coupled between the input of the delay circuit and a second input of the multiplexer. The first delay path includes a first delay device, and the second delay path includes a first inverter, a second delay device, and a second inverter. In other aspects, a delay circuit includes a latch including a first input, a second input, and an output. The first input of the latch is coupled to an input of the delay circuit. The delay circuit also includes a delay path coupled between the input of the delay circuit and the second input of the latch, wherein the delay path includes a pulse generator and a delay device.

Delay circuit that accurately maintains input duty cycle

An amplifier circuit includes an amplifier and a voltage boost circuit configured to provide a variable supply voltage to the amplifier, the variable supply voltage continuously proportional to an audio input signal, the variable supply voltage configured to follow an output of the amplifier.

Class-H switching amplifier circuit having supply voltage proportional to an audio signal

Various aspects of this disclosure describe reducing distortion of a power amplifier by coupling a common mode signal, such as determined from a voltage supply signal of the power amplifier or output of the power amplifier, to an input of the power amplifier. A resistive digital-to-analog converter (DAC) can be coupled to the power amplifier, and a common mode signal is modulated onto differential reference voltages of the DAC, causing the common mode signal to exist at both the input and output of the power amplifier at approximately the same time. Consequently, current flowing at differential inputs of the power amplifier due to the common mode component drops to zero, causing distortions due to common mode to differential mode conversion to be reduced.

Preventing distortion in a differential power amplifier

A fully differential class-D amplifier having a controlled common-mode output voltage is disclosed. The differential class-D amplifier may include a correction circuit to determine the common-mode output voltage associated with differential pulse width modulated output signals and to generate differential correction signals to control the common-mode output voltage. In some exemplary embodiments, the differential class-D amplifier may include a plurality of gain stages to generate the differential PWM output signals. The differential correction signals may be provided to at least one stage of the differential class-D amplifier.

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Irvine, CA, United States of America

Sherif Galal