Texas Instruments Corporation

Shengpin Yang

Yunlong Liu

Hong Yang

Ya Ping Chen

Jing Hu

Zhi Peng Feng

Seetharaman Sridhar

Manoj K Jain

Sunglyong Kim

Rui Liu

Peng Li

Fei Ma

Zhipeng Feng

Chao Zuo

Chao Zhuang

Yaping Chen

Dongsheng Liu

Baoqiang Niu

A method of fabricating an integrated circuit includes etching trenches in a first surface of a semiconductor layer. A trench dielectric layer is formed over the first surface and over bottoms and sidewalls of the trenches and a doped polysilicon layer is formed over the trench dielectric layer and within the trenches. The doped polysilicon layer is patterned to form a polysilicon bridge that connects to the polysilicon within the filled trenches and a blanket implant of a first dopant is directed to the polysilicon bridge and to the first surface. The blanket implant forms a contact region extending from the first surface into the semiconductor layer.

Reduced ESR in trench capacitor

A method () of fabricating a semiconductor device includes etching () a group of trenches in a semiconductor surface layer of a substrate. The group of trenches includes an outermost trench that has a first width and remaining trenches of the group of trenches have a second width that is less than the first width. The outermost trench is formed at an edge of the group of trenches. A dielectric liner is formed () in the group of trenches and the dielectric liner is etched () in an upper portion of the group of trenches to remove a partial thickness of the dielectric liner. A full thickness of the dielectric liner is maintained in a lower portion of the group of trenches. The group of trenches is filled () with a polysilicon layer.

Dual shield oxide damage control

A semiconductor device, and methods of forming the same. In one example, the semiconductor device includes a trench in a substrate having a top surface, and a shield within the trench. The semiconductor device also includes a shield liner between a sidewall of the trench and the shield, and a lateral insulator over the shield contacting the shield liner. The semiconductor device also includes a gate dielectric layer on an exposed sidewall of the trench between the lateral insulator and the top surface. The lateral insulator may have a minimum thickness at least two times thicker than a maximum thickness of the gate dielectric layer.

Semiconductor device including a lateral insulator

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Chengdu, China

Shengpin Yang