Airoha Technology Corporation

Sheng-Yow Chen

Dichi Tsai

Kuo-Yu Tseng

A manufacturing method for the inductor/transformer is disclosed. A simulator is used to simulate the inductance, the quality factor, and the self-resonance frequency of said inductor/transformer to generate at least one group of the area size, the number of the conductive layer, the line width, the number of turns, and/or the line space of the conductive layers and the first conductive layer; the inductor/transformer is manufactured according to the factors. Thereafter, the Monte-Carlo simulation is used to initiate the process variability analysis of the factors of the conductive layer and the first conductive layer, and the geometric size of the inductor/transformer can be modulated according to the results of the process variability analysis during the manufacturing process, such that the inductor/transformer can be manufactured by the process of the generic logic circuit.

Inductor/transformer and manufacturing method thereof

A semiconductor device including a substrate of a first semiconductor type with a pad region and a noise prevention structure in the substrate, on least one side of the pad region. The device further includes the substrate structure, a pad, and a dielectric layer therebetween.

Semiconductor device with a noise prevention structure

A semiconductor device. The device includes a substrate of the first semiconductor type comprising a pad region and a noise prevention structure in the substrate, on least one side of the pad region. The device further includes the substrate structure, a pad, and a dielectric layer therebetween.

An integrated circuit chip is provided. The chip includes a silicon substrate, a circuit, a seal ring, a ground ring and a guard ring. The circuit is formed on the silicon substrate and has an input/output (I/O) pad. The seal ring is formed on the silicon substrate and surrounds the circuit and the I/O pad. The ground ring is formed between the silicon substrate and the I/O pad, and the ground ring is electrically connected with the seal ring. The guard ring is formed above the silicon substrate and surrounds the I/O pad, and the guard ring is electrically connected with the seal ring.

Growing community of inventors

Taichung, Taiwan

Sheng-Yow Chen