Taiwan Semiconductor Manufacturing Comp. Ltd.

Global Unichip Corporation

Other

Realtek Semiconductor Inc.

Sheng-Wei Lin

Tze-Chiang Huang

Ching-Fang Chen

Igor Elkanovich

Yung-Sheng Fang

Pei Yu

Li-Ken Yeh

Amnon Parnass

King Ho Tam

Sheng-Tsung Wang

Wei-Cheng Tang

Li-Lung Kao

Chia-Ling Chang

Sheng-Yen Lin

Meng-Hui Hsu

Hsueh-Yu Chen

Bing-Hung Lin

Cheng-De Hong

Danver Wang

Ching-Tung Lin

Jui-Fen Ho

A semiconductor device with an interface includes a master device and a plurality of slave devices. The master device includes a master interface. The slave devices are stacked on the master device one after one as a three-dimension (3D) stack. Each of the slave devices includes a slave interface and a managing circuit, the master interface and the slave interfaces form the interface for passing signals in communication between the master device and the slave devices. The managing circuit of a current one of the slave devices drives a next one of the slave devices. An operation command received at the current one of the slave devices is just passed to the next one of the slave devices through the interface. A response from the current one of the slave devices is passed back to the master device through the interface.

Semiconductor device in 3D stack with communication interface and managing method thereof

The present invention provides a circuitry applied to multiple power domains. An amplifier of the circuitry includes an output stage and a switching circuit. The output stage includes a first transistor and a second transistor, wherein the first transistor is coupled between a supply voltage and an output terminal, the second transistor is coupled between the output terminal and a ground voltage. The switching circuit is configured to choose a body of the first transistor from the supply voltage or a reference voltage.

Circuitry applied to multiple power domains

An interface for a semiconductor device is provided. The semiconductor device has a master device and multiple slave devices as stacked up with electric connection. The interface includes a master interface, implemented in the master device and including a master interface circuit with a master bond pattern. Further, a slave interface is implemented in each slave device and includes a slave interface circuit with a slave bond pattern to correspondingly connect to the master bond pattern. A clock route is to transmit a clock signal through the master interface and the slave interface. The master device transmits a command and a selecting slave identification through the master interface to all the slave interfaces. One of the slave devices corresponding to the selecting slave identification executes the command and responds a result back to the master device through the slave interfaces and the master interface.

Interface for semiconductor device and interfacing method thereof

A data protection system and a data protection method for handling an errored command are provided. The data protection system includes a master device and a slave device. The master device is configured to send command. The slave device is coupled to the master device. The save device is configured to receive the command from the master device. The master device includes a master interface. The slave device includes a slave interface. The master interface and the slave interface are electrically connected via one or plurality of bonds and/or TSVs and configured for interfacing between the master device and the slave device. The errored command represents the command having a parity or other error. The slave device is further configured to receive the errored command and to respond the errored command according to read or write operation.

Data protection system and method thereof for 3D semiconductor device

The present invention provides a circuitry applied to multiple power domains, wherein the circuitry includes a first circuit block and second circuit block, the first circuit block is powered by a first supply voltage of a first power domain, and the second circuit block is powered by a second supply voltage of a second power domain. The first circuit block includes a first amplifier and a switching circuit. The first amplifier is configured to receive an input signal to generate a processed input signal. When the second circuit block is powered by the second supply voltage, the switching circuit is configured to forward the processed input signal to the second circuit block; and when the second circuit block is not powered by the second supply voltage, the switching circuit disconnects a path between the first amplifier and the second circuit block.

An interface for a semiconductor device includes a master device and a plurality of slave devices. The interface includes a master interface and a slave interface. The master interface is implemented in the master device and includes a master bond pattern of master bonds arranged as a first array. The slave interface is implemented each slave device and includes a slave bond pattern of slave bonds arranged as a second array. The first array of the master bonds includes a first central row and first data rows in two parts being symmetric to the first central row. The second array of the slave bonds includes a second central row and second data rows in two parts being symmetric to the second central row. The first central row and the second central row are aligned in connection, and the first data rows are connected to the second data rows.

Interface for semiconductor device with symmetric bond pattern and method for arranging interface thereof

An interface device and an interface method for interfacing between a master device and a slave device is provided. The master device generates command and the slave device generates data according to the command. The interface device includes a master interface and a slave interface. The master interface is coupled to the master device and configured to send the command to the slave device and/or receive the data from the slave device. The slave interface is coupled to the slave device and configured to receive the command from the master device and/or send the data to the master device. The master interface and the slave interface are driven by a clock generated by a clock generator. The master interface and the slave interface are electrically connected by one or plurality of bonds and/or TSVs.

Interface device and interface method for 3D semiconductor device

A mesh rendering system, a mesh rendering method and a non-transitory computer readable medium are provided. The mesh rendering system includes a database, a user device and a server. The server obtains preprocessing data of a cloth and a rigidbody according to initial mesh state of the cloth, initial mesh state of the rigidbody and motion of the rigidbody, wherein the cloth and the rigidbody are deformable and motion of the cloth corresponding to the motion of the rigidbody is a small deformation. The server stores the preprocessing data in the database. A finite state machine of the server receives a real-time input data from the user device through a web service and the preprocessing data, and the finite state machine outputs a deformation result of the cloth and the rigidbody to the user device through a handshake mechanism.

Mesh rendering system, mesh rendering method and non-transitory computer readable medium

Disclosed is a dual-purpose cane, which includes a shaft unit, a handgrip unit, which is provided at the top side of the shaft unit and alternatively set between a first mode for use as a handgrip and a second mode for use as a seat, and a footpiece unit, which is provided at the bottom side of the shaft unit and alternatively set between a received position for enabling the cane to be used as a walking stick and an extended position for enabling the cane to be used as a chair.

Growing community of inventors

Hsinchu, Taiwan

Sheng-Wei Lin