Kabushiki Kaisha Toshiba

Solid State System Co., Ltd.

Sheng-Lin Hung

Hitoshi Shiga

Chih-Hung Wang

Chih-Chung Chen

A memory system includes a memory cell array, a bit line switch, first and second page buffers, a column switch, an error correction circuit, and control circuits. The second page buffer can swap data with the first page buffer. The control circuits controls the bit line switch and the first and second page buffers, sequentially reads, page by page, one or more pages from the mth (m is a positive integer) page to the nth (n is an integer greater than m) page of the first block in the memory cell array, controls the error correction circuit to perform error correction calculation by the error correction circuit, controls the first and second data buffers and the bit line switch, and controls to perform write in the second block in the erase state in the memory cell array.

Growing community of inventors

Jubei, Taiwan

Sheng-Lin Hung