Powerchip Semiconductor Corporation

Other

Tsinghua University

Sheng Hsun Wu

Da Sung

Tsai-Yu Huang

Fan Gang Tseng

Ming Hung Chen

A single molecule detection platform is disclosed. The single molecule detection platform comprises a light-transmissive substrate, a plurality of spherical particles and a thin film. The surface of the light-transmissive substrate is etched to form a plurality of cone-shaped structures. Each spherical particle is disposed on top of each cone-shaped structure. The sizes of the plurality of spherical particles are suitable to allow only a single protein to be attached to each spherical particle. The thin film is deposited on the surface of the plurality of cone-shaped structures and acts as a reflective layer of one-dimensional waveguide. The plurality of spherical particles is not covered by the thin film.

Single molecule detection platform, manufacturing method thereof and method using the same

A method of manufacturing a silicon-oxide-nitride-oxide-silicon (SONOS) memory is provided herein. In the method, a bottom silicon oxide layer is formed over a substrate. A patterned mask layer having a trench therein is formed over the bottom silicon oxide layer. A charge-trapping layer is formed over the substrate covering the surface of the trench. The charge-trapping layer is etched back to form a pair of charge storage spacers on the sidewalls of the trench. After removing the mask layer, a top silicon oxide layer is formed over the substrate covering the charge storage spacers and the bottom silicon oxide layer. A gate corresponding to the pair of charge storage spacers is formed on the top silicon oxide layer. A source/drain region is formed in the substrate on each side of the gate.

Method of manufacturing a SONOS memory

A split gate flash memory cell includes a substrate having a device isolation structure; a selective gate structure disposed on the substrate; an interlayer dielectric layer having an opening disposed on the substrate, wherein the opening exposes a portion of the selective gate structure, the substrate and the device isolation structure; a floating gate disposed in the opening and extended to cover a surface of the interlayer dielectric layer; a tunneling dielectric layer disposed between the floating gate and the selective gate structure; a gate dielectric layer disposed between the floating gate and the control gate; a source region disposed in the substrate on one side of the control gate that is not adjacent to the selective gate structure, and a drain region disposed in the substrate on one side of the selective gate that is not adjacent to the control gate.

Split gate flash memory cell and manufacturing method thereof

A method of manufacturing a non-volatile memory cell is described. The method includes forming a first dielectric layer on a substrate and then forming a patterned mask layer with a trench on the first dielectric layer. A pair of charge storage spacers is formed on the sidewalls of the trench. The patterned mask layer is removed and then a second dielectric is formed on the substrate covering the pair of charge storage spacers. A conductive layer is formed on the second dielectric layer and subsequently patterned to form a gate structure on the pair of charge storage spacers. Portions of the second and first dielectric layers outside the gate structure are removed and then a source/drain region is formed in the substrate on each side of the conductive gate structure.

Method of manufacturing a dual bit flash memory

A method of manufacturing a non-volatile memory cell includes forming a first dielectric layer on a substrate. A second dielectric layer having a trench is formed on the first dielectric layer. Thereafter, a pair of charge storage spacers is formed on sidewalls of the trench. A third dielectric layer is then formed over the substrate to cover the first dielectric layer, the charge storage spacers and second dielectric layer. A conductive structure is formed on the third dielectric layer over the charge storage spacers. Subsequently, portions of the third dielectric layer, the second dielectric layer and first dielectric layer not covered by the conductive structure are removed. Ultimately, source/drain regions are formed in the substrate at each side of the conductive structure.

Method of manufacturing non-volatile memory cell

Split gate flash memory cell

An instrument for condensing the natural light into the inside of room is disclosed. By the combination of several convexo-convex lens and convexoplane lenses and fluorescent mirror, the natural light can be absorbed, condensed and filtered to illuminate the inside of a room. Meanwhile, a controllable hood will be utilized as a filter screen if the natural light is too dazzling.

Growing community of inventors

Hsinchu, Taiwan

Sheng Hsun Wu