Micron Technology Incorporated

Shen Hu

Anish A Khandekar

Nicholas R Tapias

Sanjeev Sapra

Sanh D Tang

Xiao Li

Song Guo

Zhiqiang Xie

Yan Li

John David Hopkins

Jordan D Greenlee

Thomas Arthur Figura

Allen McTeer

Rita J Klein

John Mark Meldrim

Nancy M Lomeli

Shuangqiang Luo

Alyssa N Scarbrough

Silvia Borsari

Hung-Wei Liu

Jeffery B Hull

Jiewei Chen

Kangle Li

Sau Ha Cheung

Naiming Liu

Corey Staller

Somik Mukherjee

Vivek Yadav

Methods, apparatuses, and systems related to forming a semiconductor using hybrid oxidation are described. An example method includes forming an opening to create an isolation region in a semiconductor substrate. The example method further includes depositing a first dielectric into the isolation region at a first oxidation rate. The example method further includes depositing a second dielectric into the isolation region at a second oxidation rate.

Semiconductor formation using hybrid oxidation

A memory array comprising strings of memory cells comprises laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers. Strings of memory cells comprise channel-material strings that extend through the insulative tiers and the conductive tiers in the memory blocks. A through-array-via (TAV) region comprises TAV constructions that extend through the insulative tiers and the conductive tiers. The TAV constructions individually comprise a radially-outer insulative lining and a conductive core radially-inward of the insulative lining. The insulative lining comprises a radially-inner insulative material and a radially-outer insulative material that are of different compositions relative one another. The radially-outer insulative material is in radially-outer recesses that are in the first tiers as compared to the second tiers. The radially-inner insulative material extends elevationally along the insulative tiers and the conductive tiers. Other embodiments, including method, are disclosed.

Memory arrays comprising strings of memory cells and methods used in forming a memory array comprising strings of memory cells

A method of forming an apparatus comprises forming pillar structures extending from a base material. Upper portions of the pillar structures may exhibit a lateral width that is relatively greater than a lateral width of lower portions of the pillar structures. The method also comprises forming access lines laterally adjacent to the lower portions of the pillar structures and forming digit lines above upper surfaces of the pillar structures. Memory devices and electronic systems are also described.

Apparatuses including elongate pillars of access devices

Methods, apparatuses, and systems related to semiconductor structure formation are described. An example method includes forming an opening through silicon (Si) material, formed over a semiconductor substrate, to a first depth to form pillars of Si material. The example method further includes depositing an isolation material within the opening to fill the opening between the Si pillars. The example method further includes removing a portion of the isolation material from between the pillars to a second depth to create a second opening between the pillars and defining inner sidewalls between the pillars. The example method further includes depositing an enhancer material over a top surface of the pillars and along the inner sidewalls of the pillars down to a top portion of the isolation material.

Semiconductor structure formation

An example apparatus includes forming a working surface of a substrate material. The example apparatus includes trench formed between two semiconductor structures on the working surface of the substrate material. The example apparatus further includes access lines formed on neighboring sidewalls of the semiconductor structures opposing a channel region separating a first source/drain region and a second source/drain region. The example apparatus further includes a time-control formed inhibitor material formed over a portion of the sidewalls of the semiconductor structures. The example apparatus further includes a dielectric material formed over the semiconductor structures to enclose a non-solid space between the access lines.

An example method includes patterning a working surface of a semiconductor wafer. The example method includes performing a first deposition of a dielectric material in high aspect ratio trenches. The example method further includes performing a high pressure, high temperature vapor etch to recess the dielectric material in the trenches and performing a second deposition of the dielectric material to continue filling the trenches.

Methods of forming an apparatus including device structures including pillar structures, and related memory devices, and electronic systems

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Boise, ID, United States of America

Shen Hu