Faraday Technology Corporation

Shen-Chang Wang

Chang-Chin Chung

A command reorder device with a retry function and an operation method thereof are provided. The command reorder device includes a first switch circuit, multiple command buffers, a second switch circuit, and a queue control circuit. The queue control circuit controls the first switch circuit to push an input command of an input command string to a first command buffer. The queue control circuit controls the second switch circuit to pop out an output command from a second command buffer based on a programmable reorder policy. The queue control circuit checks whether an error notification is received during a monitoring period from when the output command is popped out from the second command buffer. According to the check result, the queue control circuit determines either to pop out the output command from the second command buffer again, or to release the memory space of the second command buffer.

Command reorder device with retry function and operation method thereof

A FIFO circuit for a DDR memory system includes a pointer generator and a FIFO circuit. The FIFO circuit includes a pointer generator and a FIFO buffer. The pointer generator receives a first reset signal and a delay select signal from the memory controller. After the first reset signal is de-asserted, the pointer generator generates a write pointer according to a first reference clock and the pointer generator generates a read pointer according to a second reference clock. An input data is stored into the FIFO buffer according to the first reference clock and the write pointer. An output data is outputted from the FIFO buffer according to the second reference clock and the read pointer.

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Hsinchu, Taiwan

Shen-Chang Wang