International Business Machines Corporation

Sheldon Ray Bailey

Alongkorn Kitamorn

Michael Alan Kobler

Wayne Allan Britson

Gary Dean Anderson

Brent William Jacobs

Alwood Patrick Williams, Iii

Michael Youhour Lim

Matthew Scott Spinler

Erlander Lo

Raymond Leslie Hicks

Bradley W Bishop

Stuart Allen Werbner

Allegra R Segura

To select a master controller from a plurality of controllers, a computing system may consider whether connections between components within field replaceable units (FRUs) are functional as well as the data dependencies between the FRUs. For example, in addition to identifying whether the connections between the FRUs and the controllers are functional, the computing system sends instructions to each of the FRUs coupled to the controllers to determine if inter- and intra-FRU connections required for booting a compute node hosting the FRUs are functional. For instance, one FRU may depend on data from another FRU in order to boot. If a communication link between the FRUs is non-functional, the compute node may fail to boot. The computer system uses these evaluations to determine which of the controllers to select as the master.

Evaluation of field replaceable unit dependencies and connections

Disclosed is a computer implemented method, data processing system, and apparatus to respond to detection of a hardware interface error on a system bus, for example, during a concurrent maintenance operation. The service processor may receive an error on the system bus. The error identifies at least one field replaceable unit and may inhibit the suppression of clock signal to the field replaceable unit. The service processor adds an identifier of the field replaceable unit to an eligible Field Replaceable Unit (FRU) list. The service processor recursively adds at least one field replaceable unit that the field replaceable unit depends upon. The service processor suppresses the clock signal to the field replaceable unit. The service processor inhibits tagging the field replaceable unit as unusable for next initial program load.

Hardware recovery responsive to concurrent maintenance

A system and method for fast system recovery that bypasses diagnostic routines by disconnecting failed hardware from the system before rebooting. Failed hardware and hardware that will be affected by removal of the failed hardware of the system are disconnected from the system. The system is restarted, and because the failed hardware is disconnected, diagnostic routines may safely be eliminated from the reboot process.

Method for fast system recovery via degraded reboot

A method for managing a system's computer resources, includes: detecting an error condition in a computer resource; labeling the computer resource as not usable based on the error condition detected; reconfiguring the remaining computer resources to compensate for the detected error condition based on a failure mode policy; and wherein the failure mode policy manages the computer resources by one of: maximizing the amount of the remaining computer resources (mode 1), and maximizing the speed of the remaining computer resources (mode 2).

Method and system for managing resources during system initialization and startup

A minimally degraded configuration is determined when failing connections occur. Associative deconfigurations are determined from deconfiguring hardware items in a server system, associative groups are derived, and failed connections are determined. Failed connections are determined between two hardware items that are in the same associative group, and the two hardware items at both endpoints of the failed connection are deconfigured. Each associative group state is set to unknown, and the failed connections are counted where a single endpoint of the failed connection is within the associative group. The associative group state is set to deconfigured, if a member of the associative group was deconfigured. Counts of the associative groups that remain in the unknown state are analyzed, and the associative group with the smallest failed connection count is selected and set to a configured state. The other associative group at the other end is set to a deconfigured stated, and the hardware item in the other associative group is deconfigured.

Method and computer program product for determining a minimally degraded configuration when failures occur along connections

A method, apparatus, and computer instructions in a data processing system for managing clocks. The functionality of clock sources in the data processing system is verified to identify a set of valid clock sources in response to beginning an initial load process. Hardware is initialized in the data processing system using a valid clock source from the set of valid clock sources.

Method and apparatus for enhancing system clock availability

A method and system for managing uncorrectable data error conditions from an I/O subsystem as the UE passes through a plurality of devices in a central electronic complex (CEC) is disclosed. The method and system comprises detecting a I/O UE by at least one device in the CEC; and providing an SUE-RE (Special Uncorrectable Data Error-Recoverable Error) attention signal by at least one device to a diagnostic system that indicates the I/O UE condition. The method and system further includes analyzing the SUE-RE attention signal by the diagnostic system to produce an error log with a list of failing parts and a record of the log. A method and system in accordance with the present invention provides a new fault isolation methodology and algorithm, which extends the current capability of a service processor runtime diagnostic code (PRD). The method allows for the accurate determination of an error source and provides appropriate service action if and when the system fails to recover from the UE condition. This new methodology allows a more focused determination of error source and appropriate service action if and when the system fails to recover from an I/O UE.

Method and system for fault isolation methodology for I/O unrecoverable, uncorrectable error

A method of de-allocating multiple processor cores sharing a failing bank of memory is disclosed. The method allows new multiple-processor integrated circuits with on-chip shared memory to be de-allocated using existing technology designed for use with single-processor integrated circuit technology.

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Rochester, MN, United States of America

Sheldon Ray Bailey