Stats Chippac Pte. Ltd.

St Assembly Test Services Inc.

Chippac, Inc.

Sheila Alvarez

Il Kwon Shim

Hin Hwa Goh

Frederick Rodriguez Dahilig

Jian Jun Li

Glenn Omandam

Geun Sik Kim

Robinson Quiazon

Ma Shirley Asoy

Jae Soo Lee

A flip chip lead frame package includes a die and a lead frame having a die paddle and leads, and has a spacer to maintain a separation between the die and the die paddle. Also, methods for making the package are disclosed.

Semiconductor flip chip package having substantially non-collapsible spacer

A method of laser-marking a semiconductor device involves providing a semiconductor wafer having a plurality of solder bumps formed on contact pads disposed on its active surface. The solder bumps have a diameter of about 250-280 &#x3bc;m. A backgrinding tape is applied over the solder bumps. The tape is translucent to optical images. A backside of the semiconductor wafer, opposite the active surface, undergoes grinding to reduce wafer thickness. The backside of the semiconductor wafer is laser-marked while the tape remains applied to the solder bumps. The laser-marking system including an optical recognition device, control system, and laser. The optical recognition device reads patterns on the active surface through the tape to control the laser. The tape reduces wafer warpage during laser-marking to about 0.3-0.5 mm. The tape is removed after laser-marking the backside of the semiconductor wafer.

Semiconductor device and method of laser-marking wafers with tape applied to its active surface

A new method is provided for the creation of high-accuracy and low-accuracy openings overlying points of electrical access over the surface of a semiconductor device supporting substrate. Openings are first created for access to the substrate followed by copper plating and then patterning of the plated layer of copper, creating the interconnect metal over the surface of the substrate. A first solder mask is coated over the surface of the substrate, this first solder mask must be provided with a first array of low-accuracy openings for electrical access there-through for the placement of contact balls. The first openings can be created using conventional film artwork since low accuracy is required for the contact ball openings, resulting in a low-cost process for the creation of the first openings. A second solder mask is next coated over the surface of the first solder mask. Through this second solder mask is created a second array of high-accuracy second openings that provide access to solder bumps using methods of laser ablation, resulting in a low-throughput process which however is only applied to create access to solder bumps.

Cost effective substrate fabrication for flip-chip packages

Growing community of inventors

Singapore, Singapore

Sheila Alvarez