Motorola Corporation

Other

Shay-Ping T Wang

Shao Wei Pan

ShaoWei Wei Pan

Scott Edward Lloyd

Nicholas M Labun

Stephen Chih-Hung Ma

Dan Teng

David A Hayner

Christopher J LeBeau

Jeffrey G Toler

Michael C Murdock

Bernard Eugene Sigmon

Kevin M Laird

James Douglas Dworkin

Stephen L Smith

John Michael Buss

James H Errico

Shao-Wei Pan

Michael Karel Lindsey

Paul A Ogden

Bruce Edward Stuckman

Sanjar Ghaem

James E Mitzlaff

Theodore Mazurkiewicz

Sam M Daniel

Yaron Ben-Arie

Keith Vaclav Warble

Itzhak Barak

Effi Orian

Jacob A Kirschenbaum

Thomas J McClaughry

Michael Murdock

James M Richey

Ramamoorthy Srinath

Srinivas L Panchumarthi

John J Loda

Gil E Levendel

Doron Kolton

Stephen-Chih-Hung Ma

Walter L Moulton

In one embodiment there is provided a power management system for managing the power from solar panels and rechargeable batteries to power a system that includes DC loads and AC loads. The power management system includes a DC-DC converter in communication with the solar panels, a first switch positioned to control power from the DC-DC converter, to and from the rechargeable batteries, and to the DC loads and AC loads, and when in response to a power requirement from the system being equal to or less than a solar panel power provided by the solar panels, the first switch automatically set, by the power management system, to supply the system with only the solar panel power, and wherein any excess solar panel power not consumed by the system is at the same time automatically directed to recharge the rechargeable battery.

Single chip solution for solar-based systems

A mobile terminal having one or more of the following modes: a standby mode, talk mode, send/receive mode, and read/write mode, includes a cell array being capable of providing a cell array power and a backup battery being capable of providing battery power. The mobile terminal has a power management system that when the mobile terminal enters standby mode and/or read/write mode, has the ability to supply the mobile terminal with only cell array power. The power management system further has, when the mobile terminal enters talk mode and/or send/receive mode, the ability to supply the mobile terminal with battery power and/or cell array power. In both events, the power management system has the ability to send any excess cell array power to recharge the battery.

Mobile device with cell array

An artificial neuron, which may be implemented either in hardware or software, has only one significant processing element in the form of a multiplier. Inputs are first fed through gating functions to produce gated inputs. These gated inputs are then multiplied together to produce a product which is multiplied by a weight to produce the neuron output.

Artificial neuron and method of using same

A method and apparatus for efficient power amplification of a wideband signal with a correspondingly wide modulation bandwidth includes an envelope detector (220), a soft switch modulator (270), and a power amplifier (260). The soft switch modulator (270) drives a high side switch (330), and a low side switch (340) to amplify a pulsewidth modulated signal. Electrical signal path lengths within a soft switch driver (320) are dynamically modified so as to always turn off one switch before turning on the other.

Method and apparatus for high efficiency power amplification

A system and method of using a computer processor (34) to generate a solution to a linear system of equations is provided. The computer processor (34) executes a Jacobi iterative technique to produce outputs representing the solution. Multiplication operations required by the iterative technique are performed using logarithmic arithmetic. With logarithmic arithmetic, a multiplication operation is accomplished using addition. For a given n.times.n matrix A, the computer processor (34) can compute an inverse matrix A.sup.-1 by repeatedly executing the iterative technique to solve n linear systems.

Method and system for solving linear systems

A digital log converter is provided which includes a comparator (10) and a log signal generator (20). Upon receiving a digital input signal (12), the comparator (10) determines whether an upper bit-slice of the input signal (12) equals zero. If the upper bit-slice is zero, the log signal generator (20) subtracts an offset from at least one parameter to generate a log signal (16); otherwise, the log signal generator (20) interpolates the at least one parameter and a lower bit-slice of the input signal (12) to generate the log signal (16).

Log converter utilizing offset and method of use thereof

An enhanced digital beamformer (EDBF) (210, FIG. 2) is provided for use in a transceiver subsystem (200, FIG. 2) for mitigating interference and increasing the frequency reuse factor in communication systems. The EDBF is used to produce wide nulls (520, FIG. 5) in at least one steerable antenna beam pattern. By directing wide nulls at undesired signals, the EDBF provides a more efficient processing of antenna beam patterns in communication systems. The EDBF is used in geostationary satellites, non-geostationary satellites, and terrestrial communication devices. The EDBF combines a unique algorithm, a special processor, and an array antenna to significantly improve the capacity of current and future communication systems, while remaining compatible with existing modulation techniques.

Method and apparatus for producing wide null antenna patterns

An electronic apparatus that includes a digital processor (12), a first digital pulse width modulator (304), a second digital pulse width modulator (306), a combining circuit (308), and a load (310). The digital processor (12) produces a first digital signal (314) and a second digital signal (316). The first digital pulse width modulator (304) is responsive to the first digital signal (314), and the second digital pulse width modulator (306) is responsive to the second digital signal (316). The combining circuit (308) is responsive to the first digital pulse width modulator (304) and the second digital pulse width modulator (306). The load (310) is responsive to the combining circuit (308).

Apparatus for amplifying a signal using digital pulse width modulators

In a parallel computer system having N parallel computing units a data pipeline connects all the computing units. In addition the computing units are coupled to a random access memory so that each computing unit is assigned to one column of the memory array. To perform a digital signal processing filter operation the required coefficients are stored in the memory so that one or more different filter operations can be carried out in an interleaved way.

Computer system to perform a filter operation using a logarithm and

A method and system for an L.sub.1 norm operation are provided. A sequence of input signals is distributed through a data pipeline to a programmable accumulator. The accumulator sums the input signals to generate an output signal. The L.sub.1 norm operation can be performed using the distance between two vectors.

Method and system for performing an L.sub.11 norm operation

An apparatus that includes a logarithm based processor (216) having at least one digital logarithm converter (202) and a power amplifier (208) responsive to the logarithm based processor (216).

Apparatus using a logarithm based processor

An output-processing circuit for a neural network, which may be implemented on an integrated circuit, comprises at least one latch and at least one adder. Outputs from a plurality of neurons are sequentially received by the output-processing circuit. The output-processing circuit uses gating functions to determine which neuron outputs are summed together to produce neural network outputs.

Output-processing circuit for a neural network and method of using same

A converter, which may be used for implementing either logarithmic or inverse-logarithmic functions, includes a memory, a multiplier, and an adder. The memory stores a plurality of parameters which are derived using a least squares method to estimate a logarithmic or inverse-logarithmic function over a domain of input values.

Logarithm/inverse-logarithm converter and method of using same

A method and system for an L.sub.2 norm operation are provided. A sequence of input signals is converted to a sequence of log signals. The sequence of log signals is distributed through a data pipeline to a plurality of processing elements which effectively multiply each log signal by a factor of two to produce a plurality of term signals. The term signals are then converted to inverse-log signals which are summed to produce a feedback signal. The square-root of the feedback signal is computed to generate an output signal. The log/inverse-log conversions of signals are based on estimating a log/inverse-log function using a second-order polynomial. The L.sub.2 norm operation can be performed using the distance between two vectors.

Method and system for performing an L.sub.2 norm operation

Growing community of inventors

Long Grove, IL, United States of America

Shay-Ping T Wang