Intel Corporation

Amazon Technologies, Inc.

Other

Shay Gueron

Vinodh Gopal

Wajdi K Feghali

Michael E Kounavis

Martin Guy Dixon

Srinivas Chennupaty

Vlad Krasnov

Raghunandan Makaram

Ittai Anati

Gad Shlomo Sheaffer

Shlomo Raikin

Gilbert M Wolrich

Zeev Sperber

Mohan J Kumar

Ram K Krishnamurthy

Sanu K Mathew

Carlos V Rozas

Amit Gradstein

Rodrigo Branco

Vedvyas Shanbhogue

Matthew John Campagna

Uday R Savagaonkar

Kirk S Yap

Francis X Mckeen

Bradley A Burres

Moshe Maor

Robert Valentine

Gilbert A Neiger

Siddhartha Chhabra

Vincent R Scarlata

Simon Rubanovich

Simon P Johnson

Ilya Alexandrovich

Tsvika Kurts

Konstantin Levit-Gurevich

Jacob Doweck

Brent Ralph Boswell

Nadav Bonen

Mayank Bomb

Israel Hirsh

John Totah

Boris Dolgunov

Elias Khoury

William Penner

Boaz Ouriel

Rodrigo Rubira Branco

Vladislav Mladentsev

Maor Kima

Eran Shlomo

David M Durham

Barry E Huntley

Jesse R Walker

Erdinc Ozturk

Ernie F Brickell

Stephen Anthony Fischer

Howard C Herbert

Michael A Goldsmith

Daniel Nemiroff

Gideon Gerzon

Rebekah M Leslie-Hurd

Zvika Greenfield

Jiangtao Li

David Johnston

George W Cox

Farhana Sheikh

Ernest F Brickell

James S Coke

Alberto J Martinez

Charles E Dike

Francis McKeen

Ofir Mulla

Vasantha K Erraguntla

Edward V Gamsaragan

Makaram Raghunandan

Kumar K Chinnaswamy

Rajaraman Ramanarayanan

William Colin Wood

Julien Fefe Sebot

Gunendran Thuraisingham

Greg W Piper

A processor includes a decode unit to decode an SM3 two round state word update instruction. The instruction is to indicate one or more source packed data operands. The source packed data operand(s) are to have eight 32-bit state words A, B, C, D, E, F, G, and Hthat are to correspond to a round (j) of an SM3 hash algorithm. The source packed data operand(s) are also to have a set of messages sufficient to evaluate two rounds of the SM3 hash algorithm. An execution unit coupled with the decode unit is operable, in response to the instruction, to store one or more result packed data operands, in one or more destination storage locations. The result packed data operand(s) are to have at least four two-round updated 32-bit state words A, B, E, and F, which are to correspond to a round (j+2) of the SM3 hash algorithm.

SM3 hash algorithm acceleration processors, methods, systems, and instructions

A system coordinates with remote hardware to execute customer workloads. The system uses an architecture for ensuring trust to ensure that debugging is not performed at the remote hardware while the customer workload is being executed on the remote hardware without customer consent. For example, debugging at the remote hardware may enable an entity performing the debugging to view certain aspects of the customer's workload. The architecture for ensuring trusts uses a shared secret to ensure customer consent is given before debugging can be performed while the customer's workload is being executed on the remote hardware.

Remote hardware execution service with customer consented debugging

Systems and techniques of the present disclosure may provide remote debugging of an integrated circuit (IC) device while preventing unauthorized access of device intellectual property (IP). A system may include an IC device that generates an encrypted session key and an interface that enables communication between the IC device and a remote debugging site. The interface may enable the IC device to send the encrypted the encrypted session key to initiate a remote debug process, receive an acknowledgement from the remote debugging session, and authenticate the acknowledgement. Further, the interface may enable to the IC device to initiate a secure debug session between the IC device and the remote debugging site.

Systems and methods for intellectual property-secured, remote debugging

System and techniques for multi-tenant cryptographic memory isolation are described herein. A multiple key total memory encryption (MKTME) circuitry may receive a read request for encrypted memory. Here, the read request may include an encrypted memory address that itself includes a sequence of keyid bits and physical address bits. The MKTME circuitry may retrieve a keyid-nonce from a key table using the keyid bits. The MKTME circuitry may construct a tweak from the keyid-nonce, the keyid bits, and the physical address bits. The MKTME circuitry may then decrypt data specified by the read request using the tweak and a common key.

Multi-tenant cryptographic memory isolation

Various examples are directed to systems and methods for securing a data storage device. A storage controller may receive a read request directed to the data storage device. The read request may comprise address data indicating a first address of a first storage location at the data storage device. The storage controller may request from the data storage device a first encrypted data unit stored at the first memory element and a first encrypted set of parity bits, such as Error Correction Code (ECC) bits, associated with the first storage location. An encryption system may decrypt the first encrypted set of parity bits to generate a first set of parity bits based at least in part on an a first location parity key for the first address.

Secure memory

A processor of an aspect is to perform a Single Instruction Multiple Data (SIMD) instruction. The SIMD instruction is to indicate a source register storing input data to be processed by a round of AES and is to indicate a source of a round key to be used for the round of AES. The processor is to perform the SIMD instruction to perform the round of AES on the input data using the round key and store a result of the round of AES in a destination. In one aspect, the SIMD instruction is to provide a parameter to specify whether or not a round of AES to be performed is a last round. Other instructions, processors, methods, and systems are described.

Architecture and instruction set for implementing advanced encryption standard (AES)

Protection against the obsolescence of cryptographic algorithms is provided by generating a cryptographic key pair for future use and storing the public key on a device. The cryptographic key pair supports a signature scheme that is potentially resistant to quantum computing attacks. In an embodiment, a key management server generates a set of one-time use keys sufficient to sign the anticipated number of software updates to be applied to a device. The key management server provides a public key which is stored on the device for later use. In an embodiment, an update to the device us signed with the one-time-use private key, and can be authenticated by the device using the public key. In an embodiment, the key pair supports the use of a one-time signature technique such as a Merkle signature scheme, Winternitz signature, or Lampert signature.

Cryptographic key generation and deployment

Plaintext data is encrypted and decrypted using a symmetric encryption algorithm that generates a sequence of pseudorandom values from a cryptographic key. A portion of the sequence of pseudorandom values is discarded. For example, in an embodiment, each value in the sequence of pseudorandom values is truncated by a number of bits. Encryption and decryption is performed by combining plaintext or ciphertext with the truncated sequence of pseudorandom values. In an embodiment, the combination is made by performing a bitwise exclusive or operation between the truncated pseudorandom values and the plaintext or ciphertext. In an embodiment, a number of bits discarded from each value is encoded into a message authentication code which is provided with any resulting ciphertext.

Data encryption method and system

Techniques described herein enhance information security in contexts that utilize key management systems and other providers of cryptographic services. A user of a key, management system is able to use a secret that is outside the control of the key management system combined with a secret that is cryptographically protected by the key management system (e.g., by encryption using a key managed by the key management system) to generate a message encryption key, thereby rendering the secrets individually insufficient for access to data encrypted using the message encryption key.

Secure data storage using multiple factors

Growing community of inventors

Haifa, Israel

Shay Gueron