Apple Inc.

Shawn P Hurley

Hyunwoo Nho

Kingsuk Brahma

Jie Won Ryu

Marc Joseph DeVincentis

Peter F Holland

Arthur L Spence

Ardra Singh

Jongyup Lim

Zhe Hua

Wei Hsin Yao

Ming Xu

Paolo Sacchetto

Warren S Rieutort-Louis

Qing Li

Christopher P Tann

Hyunsoo Kim

Mohammad Ali Jangda

Chun Lu

Jenny Hu

David S Hum

Yue Jack Chu

Graeme M Williams

Alex H Pai

Gihoon Choo

Daniel J Drusch

Ce Zhang

Agnes Lee

Feng Wen

Alexandre V Gauthier

Ka Kuen Wan

Alex D Schlaupitz

Ing-Jye Wang

To reduce overall power consumption for an electronic display power management integrated circuit (PMIC), one of multiple electric power converters and/or electric power regulators may be selected based on an electrical load (e.g., due to the total brightness of the content displayed) on the electronic display at a given moment. In some embodiments, the PMIC may include a less efficient heavy load converter designed with high-current handling capability and a more efficient light load (e.g., low current) converter with lower current handling capability. A controller may dynamically select between the converters depending on a present load or an expected load on the electronic display.

Content-aware dynamic power converter switching for power optimization

An electronic device may include processing circuitry configured to generate a first frame of image content and a second frame of image content. The second frame of image content is different from the first frame of image content. The electronic device may also include a display configured to display the first frame of image content at a first refresh rate. In response to receiving the second frame of image content, the electronic device may initially increase the refresh rate before tapering back to the first refresh rate while displaying the second frame of image content.

Frame insertion and frame rate sequencing for panel glitch prevention

This disclosure is directed towards systems and methods of power saving in electronic displays based on changing clock signal frequencies supplied to the gate-in-panel (GIP) circuitry during extended blanking modes of the electronic display. The display driver circuitry of the display may reduce and/or halt clock signal frequencies sent to GIP circuitry in the display, to reduce power output during extended blanking modes of the electronic display.

Systems and methods for clock frequency control during low display refresh rates in electronic devices

A backlight unit may be used to produce backlight illumination for a display. The backlight unit may have a row of light-emitting diodes that are mounted on a flexible printed circuit and that emit light into a light guide layer. The backlight unit may include a chassis that extends around the periphery of the light guide layer. The chassis may have a first portion that is mounted on the flexible printed circuit adjacent to the light-emitting diodes and a second portion that extends over the light-emitting diodes. A heat spreading layer may be attached to a reflector layer and the flexible printed circuit. The heat spreading layer may have a width that is less than the width of the reflector layer. Adhesive patches may attach the light guide layer to the flexible printed circuit. A patterned adhesive layer may be formed over the light-emitting diodes and the light guide layer.

Electronic device display with a backlight

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Sunnyvale, CA, United States of America

Shawn P Hurley