Altera Corporation

Shawn Malhotra

Deshanand Pratap Singh

Valavan Manohararajah

Stephen D Brown

Mark Bourgeault

Terry Borer

Ketan Padalia

Steven Caranci

Karl Schabas

Mark Ari Teper

A method for designing a system on a target device includes determining a realization set of a signal that includes one or more representations of the signal where at least one of the representation is influenced by a Don't Care Set (DCS) and all representations are equivalent. The realization set is propagated through the system with the signal. The realization set is used to perform a plurality of separate optimizations on the logic.

Method and apparatus for performing optimization using don't care states

Method and apparatus for performing optimization using Don't Care states

A method for generating a design for a system to be implemented on a target device includes compiling the design. Information used to make a compilation decision on the design is stored. A strategy to improve timing closure on a signal path on the design is derived using the information.

Method and apparatus for performing automated timing closure analysis for systems implemented on target devices

An integrated hardware and software debugging system debugs software running on a processor and debugs hardware blocks that perform operations separate from the processor. Cycle traces are recorded for hardware block operations and the data is presented to a user through the same interface used for software debugging. Where hardware blocks are implemented in configurable circuitry (such as an FPGA) from source code, hardware debugging is linked to the source code to simulate stepping through the source code.

Hardware and software debugging

A method for designing a system on a target device utilizing field programmable gate arrays (FPGAs) includes duplicating a plurality of components in response to slack values associated with connections to the components in placement locations.

Method and apparatus for performing compound duplication of components on field programmable gate arrays

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Toronto, Canada

Shawn Malhotra