Bell Communications Research, Inc.

Shaw-Min Lei

Ming-Ting Sun

Ting-Chung Chen

Kou-Hu Tzou

Four QCIF video input signals generated by participants in a multiparty video conference are combined in the coded domain to produce a merged CIF video output signal. When the CIF video output signal is transmitted back to each party's video terminal, a combined 2.times.2 image is displayed. A video signal combiner (700) combines the input video signals in the coded domain by time-division multiplexing the inputs at the GOB level. In order to maintain frame synchronization between the inputs which may be arriving at different frame repetition rates, the combiner stores the inputs in buffers (706-709) and processes (710) the temporal reference (TR) numbers associated with each frame in each input before merging the GOBs from each input in accordance with the processed TR number. Specifically, the TR of each input is offset by an initial TR number associated with each input and determined at turn-on. The offset TR in each input is then mapped onto a scale of TR numbers that is common to each input. The each output frame is formed by time-division multiplexing GOBs from the inputs that have the same offset and mapped TR number. Only GOB headers and empty data fields are inserted into the combined data stream for those inputs not having a frame with that same mapped TR number.

Continous presence video signal combiner

Method and system are provided for efficient, multiplication-free arithmetic coding wherein data which represents an alphabet of source symbols is compressed and decompressed in a data transmission system. Multiplications are replaced with single shift-and-add operation using a suitable shift register wherein a multiplier has at most two bits. The shift-and-add operation approximates the width of a new subinterval within a predetermined interval. This approximation is a function of both the width of a current subinterval and a total count of source symbols in a statistical source model. In this way, an adaptive model can be accommodated as well as a fixed model for the statistics of the source symbols. In one embodiment, the multiplier is preferably determined by a table look-up having a small number of entries and which can be easily implemented by hardware or software.

Method and system for efficient, multiplication-free arithmetic coding

Method and system for high order conditional entropy coding utilizing an incremental-tree-extension technique to design a conditional tree for the coding. For complexity reduction, code table reduction and non-uniform quantization of conditioning symbols or pixels is provided. A pattern matching technique is provided for fast conditioning state extraction, and a multistage pipelined structure is provided to handle the case of a large number of conditioning pixels. Using the complexity reduction techniques and the hardware structures, it is possible to implement practical high order conditional entropy codecs using current low-cost VLSI (Very Large Scale Integration) technology.

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Tinton Falls, NJ, United States of America

Shaw-Min Lei