Industrial Technology Research Institute

Shaw-Jia Hor

Nang-Ping Tu

Chien-Cheng Tu

Chu-Chiao Yu

Yung-Yuan Ho

Jian-Yau Yih

Jean-Ming Lee

Jung-Dar Ho

The present invention discloses a biquadratic switched-capacitor filter, which merely utilizes one operational amplifier to implement a biquadratic transfer function. The biquadratic switched-capacitor filter further comprises ten switched-capacitor circuits, two feedback capacitors, and two individual switching devices. The switching devices in this switched-capacitor filter can be controlled by six different clock signals. The first and second clock signals are two-phase, complementary but non-overlapping pulse trains with a reference period. The third clock signal is a pulse train with double the reference period and coincident with the first clock signal. The fourth, the fifth, and the sixth clock signals are pulse trains that result from delaying the third, the fourth, and the fifth clock signals by half the reference period. The obtained switched-capacitor filter can be used to simplify some applications, such as sigma-delta modulators.

Biquadratic switched-capacitor filter using single operational amplifier

The continuing need for faster and denser SRAM memories places a constant increased demand on the power consumption of the memory devices. Much of the power consumption occurs during the pre-charge phase where it is common practice to bring up all pre-charge circuits at once and hold them active until the memory operations are complete. This invention describes a design where each pre-charge circuit connected to a group of memory cells through bit lines is activated at a separate time from the other pre-charge circuits. Thus each pre-charge circuit is active only during the time that useful work is being done with that portion of the memory. This reduces power consumption by not powering on circuits and precharging bit lines before they are actually needed.

Reduced power consumption sram

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Taoyuan, Taiwan

Shaw-Jia Hor