Inphi Corporation

Marvell Asia Pte., Ltd.

Shaun Lytollis

Arash Farhoodfar

Jitendra Kumar Swarnkar

Michael Duckering

Scott Feller

Andre Sczapanek

Sudeep Bhoja

Sean Batty

Andre Szczepanek

Embodiments relate to the emulation of the effect of Forward Error Correction (FEC) codes, e.g., GFReed Solomon (RS) FEC codes, on the bit error ratio (BER) of received Pseudo-Random Binary Sequences (PRBS) patterns. In particular, embodiments group errors into RS-FEC symbols and codewords in order to determine if the errors are correctable. By emulating the error correction capabilities of FEC codes in order to determine which errors are correctable by the code, embodiments afford a more accurate representation of the post-FEC BER of RS FEC codes from links carrying PRBS patterns. This FEC code emulation provides error correction statistics, for stand-alone use or for error correction in connection with Bit Error Rate Testers (BERTs).

Forward error correction including correction capability determinations based on symbol errors of error bit based codewords

The present invention is directed to data communication. In certain embodiments, the present invention provides switching mechanism for choosing between redundant communication links. Data received from a first set of communication links are processed to have alignment markers removed, and first figure of merit value is determined based on the data without alignment markers. Similarly, a second figure of merit value is determined for the data received from the second set of communication links. A switch selects between the first set of communication links and the second set of communication links based on their respective figure of merit values. Alignment markers are inserted into the data transmitted through the selected set of data links. There are other embodiments as well.

Multiplexers with protection switching

Forward error correction (FEC) emulator

Growing community of inventors

Santa Clara, CA, United States of America

Shaun Lytollis