National Semiconductor Corporation

Skyworks Solutions, Inc.

Shaul Branchevsky

Anthony James Lobianco

Howard E Chen

Devices and methods related to metallization of ceramic substrates for shielding applications. In some embodiments, a ceramic assembly includes a plurality of layers, the assembly including a boundary between a first region and a second region, the assembly further including a selected layer having a plurality of conductive features along the boundary, each conductive feature extending into the first region and the second region such that when the first region and the second region are separated to form their respective side walls, each side wall includes exposed portions of the conductive features capable of forming electrical connection with a conductive shielding layer.

Devices and methods related to metallization of ceramic substrates for shielding applications

Devices and methods related to metallization of ceramic substrates for shielding applications. In some embodiments, a method for fabricating a ceramic device can include forming a plurality of conductive features on or through a selected layer along a boundary between a first region and a second region, each conductive feature extending into the first region and the second region. The method can also include forming an assembly that includes the selected layer and one or more other layers. The method can further include separating the first region and the second region along the boundary such that each of the first region and the second region forms a side wall, the side wall including exposed portions of the conductive features, the exposed portions capable of forming electrical connection with a conductive shielding layer.

Methods related to metallization of ceramic substrates for shielding applications

Devices and method related to metallization of ceramic substrates for shielding applications. In some embodiments, a ceramic assembly includes a plurality of layers, the assembly including a boundary between a first region and a second region, the assembly further including a selected layer having a plurality of conductive features along the boundary, each conductive feature extending into the first region and the second region such that when the first region and the second region are separated to form their respective side walls, each side wall includes exposed portions of the conductive features capable of forming electrical connection with a conductive shielding layer.

A method for forming an embedded three-dimensional inductor is provided. Generally, a first coil winding is formed. A first dielectric layer is placed on the first coil winding. At least part of second coil winding is formed on the first dielectric layer and part of the first coil winding to create an electrical contact between the first coil winding and the second coil winding. A first tape layer with a cavity is provided, where the first coil winding, the first dielectric layer, and the second coil winding are within the cavity of the first tape layer.

Embedded 3D coil inductors in a low temperature, co-fired ceramic substrate

An apparatus and method for creating multi-layer embedded ceramic capacitors in low-temperature co-fired ceramic (LTCC) substrates. In order to create multiple layers of electrodes, the individual electrode layers must be connected electrically. According to the present invention, a multi-layer capacitor is formed on a first ceramic tape layer. A second tape layer having an opening is placed on top of the first layer. The opening in the second layer is formed such that exposed vias are present on at least two sides of the opening to electrically connect to the electrodes. When the tape layers are pressed and fired, the exposed vias and electrodes form common electrical connections. A third layer having a terminal via may be placed on top of the second layer.

Embedded multi-layer capacitor in a low-temperature co-fired ceramic (LTCC) substrate

Embedded green multi-layer ceramic capacitors in low-temperature co-fired ceramic (LTCC) substrates are provided. A first set of electrodes is printed on a ceramic tape. A first dielectric layer is placed over the first set of electrodes and the ceramic tape. A second set of electrodes is printed on the first dielectric layer. A second dielectric layer is placed over the second set of electrodes and the first dielectric layer. A third set of electrodes is printed on the second dielectric layer. The sheet is then cut to form separate green multi-layer ceramic capacitor chips. The green multi-layer ceramic capacitor chips are then placed in a cavity formed by ceramic tape.

Method of making an embedded green multi-layer ceramic chip capacitor in a low-temperature co-fired ceramic (LTCC) substrate

A method for providing an enhanced ball grid array attachment in low-temperature co-fired ceramic (LTCC) substrate is provided. A termination cup is formed in a substrate. The termination cup has a bottom formed by a termination pad over a via in a first tape layer and side walls formed by termination sides formed over side walls of a via in a second tape layer. A diffusion layer is formed over the termination cup. The diffusion layer helps to reduce the oxidation of the termination cup and to provide greater mechanical attachment strength. An electrically conductive adhesive may be used to connect a solder ball to the diffusion layer. Reflow then is used to complete the solder ball connection process.

Method of creating an enhanced BGA attachment in a low-temperature co-fired ceramic (LTCC) substrate

An apparatus for creating multi-layer embedded ceramic capacitors in low-temperature co-fired ceramic (LTCC) substrates. In order to create multiple layers of electrodes, the individual electrode layers must be connected electrically. According to the present invention, a multi-layer capacitor is formed on a first ceramic tape layer. A second tape layer having an opening is placed on top of the first layer. The opening in the second layer is formed such that exposed vias are present on at least two sides of the opening to electrically connect to the electrodes. When the tape layers are pressed and fired, the exposed vias and electrodes form common electrical connections. A third layer having a terminal via may be placed on top of the second layer.

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Mission Viejo, CA, United States of America

Shaul Branchevsky