International Business Machines Corporation

Shashidhar Reddy

Arun Joseph

Anthony Saporito

Matthias Klein

Wolfgang Roesner

Diwesh Pandey

Shiladitya Ghosh

Sampath Goud Baddam

Anand Haridass

Rahul Rao

Spandana V Rachamalla

A method, programming product, and/or system is disclosed for identifying flaws in integrated circuits, e.g., processors, that includes: selecting from a list of a plurality of timing issues in an integrated circuit, where each timing issue on the list is represented by one or more VHDL code lines, a particular timing issue to investigate; tracing back the selected one or more VHDL code lines, corresponding to the selected particular timing issue to investigate, to one or more selected physical design VHDL (PD-VHDL) code lines; logically navigating across the one or more selected PD-VHDL code lines to one or more corresponding normalized VHDL (NVDHL) code lines; and tracing back the one or more corresponding NHVDL code lines to one or more short-hand VHDL (SVHDL) code lines to identify one or more code lines, written by a code designer, responsible for the particular timing issue being investigated.

System for collaborative hardware RTL logic timing debug in integrated circuit designs

A method for collaborative logic designing and debugging of a circuit includes initiating, via a session manager, a hardware debug session that includes a plurality of instances of client applications that can access one or more source-codes associated with a logic design of the circuit, the plurality of instances of client applications configured to replicate an execution state of the logic design. The method also includes analyzing, using an instance of a first client application from the plurality of instances of client applications, a defect in the logic design based on the execution state of the logic design. The method also includes editing, using an instance of a second client application from the plurality of instances of client applications, the one or more source-codes, to repair the defect in the logic design.

Heterogeneous services for enabling collaborative logic design and debug in aspect oriented hardware designing

Aspects of the invention include acoustic signature generation via user sentiment embedding. An example method includes an audio signal of user speech, obtaining a user context and a user state space for at least one user, generating a sentiment vector from the user context and the user state space, generating a set of sentiment signals for based on the sentiment vector, and embedding the audio signal with the set of sentiment signals to generate an embedded sentiment signal.

Acoustic signature generation by embedding user sentiments

Method, apparatus and computer program product for hierarchical power analysis using improved activity abstraction and capacitance abstraction by accounting for design heterogeneity extremities comprising extracting design heterogeneity extremities from an RTL design; accounting for the design heterogeneity extremities during macro clock and data signals activity abstraction to generate improved macro activity abstractions; accounting for the design heterogeneity extremities during macro clock and data switching capacitance abstraction to generate improved macro capacitance abstractions; and using improved macro activity abstractions and improved macro capacitance abstractions during hierarchical chip power analysis.

Hierarchical power analysis using improved activity abstraction and capacitance abstraction by accounting for design heterogeneity extremities

An approach for recommending an activity during travel. The approach includes receiving a request for a travel destination and a desired arrival time. Furthermore, the approach determines a route to the travel destination and retrieves external data based on the route. Based on the retrieved data and the route, the approach calculates and outputs an initial activity list. And the approach measures vehicle dynamics based on one or more motion sensors and updates and outputs the activity list based on the vehicle dynamics.

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Bengaluru, India

Shashidhar Reddy