Micron Technology Incorporated

Shashank Saraf

Kevin R Gast

Lifang Xu

Matthew J King

Kunal Shrotri

Suresh Ramarajan

Jivaan Kishore Jhothiraman

Gowrisankar Damarla

Sri Sai Sivakumar Vegunta

Rithu K Bhonsle

Rutuparna Narulkar

John B Matovu

David S Meyaard

Darwin A Clampitt

Anilkumar Chandolu

Christopher J Larsen

Prakash Rau Mokhna Rau

Arun Kumar Dhayalan

Sm Istiaque Hossain

A method used in forming a memory array comprising strings of memory cells comprises forming a stack comprising vertically-alternating first tiers and second tiers comprising memory-block regions having channel-material strings therein. Conductor-material contacts are directly against the channel material of individual of the channel-material strings. First insulator material is formed directly above the conductor-material contacts. The first insulator material comprises at least one of (a) and (b), where (a): silicon, nitrogen, and one or more of carbon, oxygen, boron, and phosphorus, and (b): silicon carbide. Second insulator material is formed directly above the first insulator material and the conductor-material contacts. The second insulator material is devoid of each of the (a) and (b). Third insulator material is formed directly above the second insulator material, the first insulator material, and the conductor-material contacts. The third insulator material comprises at least one of the (a) and (b). At least one horizontally-elongated isolation structure is formed in the first and second insulator materials and in a top part of the stack in individual of the memory-block regions. Additional methods, including structure independent of method, are disclosed.

Memory arrays and methods used in forming a memory array

A method of forming a semiconductor structure includes forming a sacrificial material over a stack comprising alternating levels of a dielectric material and another material, forming an opening through the sacrificial material and at least some of the alternating levels of the dielectric material and the another material, forming at least one oxide material in the opening and overlying surfaces of the sacrificial material, an uppermost surface of the at least one oxide material extending more distal from a surface of a substrate than an uppermost level of the dielectric material and the another material, planarizing at least a portion of the at least one oxide material to expose a portion of the sacrificial material, and removing the sacrificial material while the uppermost surface of the at least one oxide material remains more distal from the surface of the substrate than the uppermost level of the alternating levels of the dielectric material and the another material. Related methods of forming semiconductor structures and related semiconductor devices are disclosed.

Stair step structures including insulative materials, and related devices

Semiconductor devices including a stair step structure, and related methods

Methods of forming semiconductor structures having stair step structures

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Boise, ID, United States of America

Shashank Saraf