Arm Limited

Shareef Justin Jalloq

Andreas Due Engh-Halstvedt

Frank Klaeboe Langtind

When writing data to memory via a write buffer including a write cache containing a plurality of lines for storing data to be written to memory and an address-translation cache that stores a list of virtual address to physical address translations, a record of a set of lines of the write cache that are available to be evicted to the memory is maintained, and the evictable lines in the record of evictable lines are processed by requesting from the address-translation cache a respective physical address for each virtual address associated with an evictable line. The address-translation cache returns a hit or a miss status to the write buffer for each evictable line that is checked, and the write buffer writes out to memory at least one of the evictable lines for which a hit status was returned.

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Cambridge, United Kingdom

Shareef Justin Jalloq