International Business Machines Corporation

Allied Telesis Holdings K.k.

Sharee Jane McNab

Yurii A Vlasov

Anna Wanda Topol

David Michael Fried

Michael Joseph Rooks

John Michael Hergenrother

Hendrik F Hamann

Martin Patrick O'Boyle

Gregory Michael Wallraff

Fengnian Xia

Steven Erik Steen

Carl Eric Larson

Raman Gobichettipalayam Viswanathan

Gabriel Konrad Dehlinger

Hayden Fowler

Tim Beale

Seiichiro Satoh

The present invention is a method and an apparatus for dynamic manipulation and dispersion in photonic crystal devices. In one embodiment, a photonic crystal structure comprises a substrate having a plurality of apertures formed therethrough, a waveguide formed by 'removing' a row of apertures, and a plurality of pairs of lateral electrical contacts, the lateral electrical contact pairs extending along the length of the waveguide in a spaced-apart manner. The lateral electrical contact pairs facilitate local manipulation of the photonic crystal structure's refractive index. Thus, optical signals of different wavelengths that propagate through the photonic crystal structure can be dynamically manipulated.

Method and apparatus for dynamic manipulation and dispersion in photonic crystal devices

A resiliency-link having a master node and slave nodes may be used to automatically avoid network conflicts due to failure of a node stack. Any stack stub formed as a result of the failure of a stack node or link may use the resiliency-link to determine whether the stack Master node is still online and providing service. If communication over the resiliency-link determines that the original Master node is offline, a new stack stub takes over and provides the desired service. If the original Master node is still online, then the new stack stub takes an appropriate alternative or fallback action.

Method and apparatus for preventing network conflict

A structure for aligning a first set of features of a fabrication level of an integrated circuit chip to an electron beam alignment target. The structure including a first trench in a semiconductor substrate, the first trench extending from a top surface of the substrate into the substrate a first distance; an electron back-scattering layer in a bottom of the first trench; a dielectric capping layer in the trench over the back-scattering layer; and a second trench in the substrate, the second trench extending from the top surface of the substrate into the substrate a second distance, the second distance less than the first distance.

High-Z structure and method for co-alignment of mixed optical and electron beam lithographic fabrication levels

A method of lithography is disclosed, which allows for independent resist process optimization of two or more exposure steps that are performed on a single resist layer. By providing for a separate post-exposure bake after each resist exposure step, pattern resolution for each exposure can be optimized. The method can generally be used with different lithographic techniques, and is well-suited for hybrid lithography. It has been applied to the fabrication of a device, in which the active area and the gate levels are defined in separate mask levels using hybrid lithography with an e-beam source and a 248 nm source respectively. Conditions for post-exposure bakes after the two exposure steps are independently adjusted to provide for optimized results.

Method for lithography for optimizing process conditions

A method for aligning a first set of features of a fabrication level of an integrated circuit chip to an electron beam alignment target including a high atomic weight layer formed in a substrate and forming the first set of features using electron beam lithography and for aligning a second set of features of the same fabrication level of the integrated circuit chip to an optical alignment target formed in the substrate and forming the second set of features using photolithography, the optical alignment target itself is aligned to the electron beam alignment target. Also a method of forming and a structure of the electron beam alignment target.

Method for co-alignment of mixed optical and electron beam lithographic fabrication levels

A method for aligning a first set of features of a fabrication level of an integrated circuit chip to an electron beam alignment target formed in a substrate and forming the first set of features using electron beam lithography and for aligning a second set of features of the same fabrication level of the integrated circuit chip to an optical alignment target formed in the substrate and forming the second set of features using photolithography, the optical alignment target itself is aligned to the electron beam alignment target. Also a method of forming and a structure of the electron beam alignment target.

Trench structure and method for co-alignment of mixed optical and electron beam lithographic fabrication levels

The present invention is a method and an apparatus for resonant coupling in photonic crystal circuits. In one embodiment, a photonic crystal device comprises a substrate having a plurality of apertures formed therethrough, a photonic crystal circuit (e.g., formed by 'removing' a series of apertures), and a strip waveguide extending through the apertures and coupled to the photonic crystal circuit via a surface localized photonic state formed at a surface of the photonic crystal (e.g., in the apertures). The surface localized photonic state facilitates the efficient resonant tunneling of photons from the wavelength-independent strip waveguide to the wavelength-selective photonic crystal circuit, thereby improving the filtering capabilities of the photonic crystal device.

Method and apparatus for resonant coupling in photonic crystal circuits

The present invention is a waveguide photodetector. In one embodiment, the waveguide photodetector includes a waveguide layer where light is guided or is confined and a detection layer formed on the waveguide layer where guided light is detected. Each of the waveguide layer and the detection layer allows for the guiding of no more than a single mode of light for a given polarization. In another embodiment, the waveguide photodetector includes a waveguide layer where light is guided or is confined, a detection layer formed on the waveguide layer where guided light is detected, a first electrical contact coupled to the detection layer, and a second electrical contact coupled to the detection layer. The first electrical contact and the second electrical contact are disposed in a spaced-apart, substantially parallel manner relative to each other.

Waveguide photodetector

The present invention is a method and an apparatus for thermo-optic control of optical signals using photonic crystal structures. In one embodiment, a first portion of a split signal is modulated by propagating the signal through a photonic crystal waveguide in which two electrical contacts are laterally spaced from the waveguide region by a plurality of apertures formed through the photonic crystal substrate. A voltage applied across the electrical contacts causes resistive heating of the proximate photonic crystal waveguide through which the signal propagates, thereby modulating the temperature relative to an un-modulated second portion of the split signal that is used as a reference.

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Christchurch, New Zealand

Sharee Jane McNab