Qualcomm Incorporated

Nvidia Corporation

Sharad Raj

Andrew Evan Gruber

Ziyad Sami Hakura

Ankit Kumar Singh

Kalyan Kumar Bhiravabhatla

Pavan Kumar Akkaraju

Krishnaiah Gummidipudi

Sriram Venkateshan

In embodiments a graphics pipeline includes a logic that can assess whether to enable or disable tiled rendering for sets of graphics primitives. The logic applies one or more rules or heuristics to a set of graphics primitives associated with a frame, and determines whether to enable tiled rendering for that set of graphics primitives if the one or more rules or heuristics are satisfied. Otherwise, the logic determines to disable tiled rendering for that set of graphics primitives. As further graphics primitives are received for the frame, the logic may make additional decisions as to whether or not to render the further graphics primitives using tiled rendering.

Heuristics enabled tiled rendering

The present disclosure relates to methods and apparatus for graphics processing. The present disclosure can calculate a center-edge distance of a first pixel, the center-edge distance of the first pixel equal to a distance from a first pixel center to one or more edges of a first primitive. Additionally, the present disclosure can store the center-edge distance of the first pixel when the first primitive is visible in a scene. The present disclosure can also determine an amount of overlap between the first pixel and the first primitive. Further, the present disclosure can blend a color of the first pixel with a color of a second pixel based on at least one of the center-edge distance of the first pixel or the amount of overlap between the first pixel and the first primitive.

Methods and apparatus for edge compression anti-aliasing

Growing community of inventors

Bengaluru, India

Sharad Raj