International Business Machines Corporation

Sun Microsystems, Inc.

University of California

Cadence Design Systems, Inc.

Sharad Mehrotra

Ricky C Hetherington

Parsotam Trikam Patel

Balakrishna Raghavendra Iyer

Vahit Hakan Hacigumus

Paul Gerard Villarrubia

Ramesh K Panwar

David J Widiger

Byron Lee Krauter

Michelle L Wong

David James Hathaway

Christopher McCall Durham

Igor Keller

Alexander Joel Suess

Krishna Prasad Belkhale

Albert E Ruehli

Chandramouli V Kashyap

Amit Dhuria

Jagannathan Narasimhan

Barry Duane Williamson

Alexander K Spencer

Mark Walz Wenning

Pawan Kulshreshtha

Pradeep Yadav

Alan C Folta

Jehan Wickramasuriya

Sri Harsha Venkata Pothukuchi

Jonathan Humphrey Saxman

Jean Pierre Hiol

Mohanned Alhazzazi

Mahesh Datt

Nalini Venkatasubramanian

An approach is described for a method, system, and product for deferred merge based method for graph based analysis to reduce pessimism. According to some embodiments, the approach includes receiving design data, static and/or statistical timing analysis data, identifying cells and interconnects for performing graph based worst case timing analysis where merger of signals is deferred based on one or more conditions to reduce pessimism, and generating results thereof. Other additional objects, features, and advantages of the invention are described in the detailed description, figures, and claims.

Method, system, and product for deferred merge based method for graph based analysis pessimism reduction

The present invention provides a computer-readable medium and system for selecting a set of n-grams for indexing string data in a DBMS system. Aspects of the invention include providing a set of candidate n-grams, each n-gram comprising a sequence of characters; identifying sample queries having character strings containing the candidate n-grams; and based on the set of candidate n-grams, the sample queries, database records, and an n-gram space constraint, automatically selecting, given the space constraint, a minimal set of an n-grams from the set of candidate n-grams that minimizes the number of false hits for the set of sample queries had the sample queries been executed against the database records.

Selection of a set of optimal n-grams for indexing string data in a DBMS system under space constraints introduced by the system

A security system which is nonintrusive of personal privacy of a person in a space comprises at least a first localization sensor subsystem, if any, in the possession of the person; a video surveillance subsystem arranged and configured to collect visual data related to the person in the space; and a computer subsystem coupled to the localization sensor subsystem and video surveillance subsystem to associate a predetermined privacy level with the localization sensor subsystem, and to provide an access control privilege with the localization sensor subsystem, the computer subsystem determining how to present, store and/or retrieve the visual data while meeting predetermined the privacy level associated with the person.

Apparatus and method for privacy protection of data collection in pervasive environments

A client-server relational database system, wherein data from the client computer is encrypted by the client computer and hosted by the server computer, the encrypted data is operated upon by the server computer, using one or more operators selected from a group of operators comprising: (a) inequality logic operators, (b) aggregation operators, and (c) wildcard matching operators, to produce an intermediate results set, the intermediate results set is sent from the server computer to the client computer, and the intermediate results set is decrypted and filtered by the client computer to produce actual results. The group of operators is limited because the encrypted results set, when decrypted, includes inaccuracies therein. The client computer applies a set of correction procedures to the decrypted results set to remove the inaccuracies therein.

Querying encrypted data in a relational database system

A client-server relational database system includes a client computer connected to a server computer via a network. Data from the client computer is encrypted by the client computer and hosted by the server computer. The encrypted data is operated upon by the server computer to produce an intermediate results set. The intermediate results set is sent from the server computer to the client computer where it is operated upon by the client computer and then returned to the server computer where it is further operated upon by the server computer before being sent again from the server computer to the client computer in order to produce actual results.

Query optimization in encrypted database systems

A system that facilitates generating a global routing for a layout of an integrated circuit operates by receiving a netlist to be routed. The system partitions this netlist into global signals, datapath signals, and control signals. Next, the system creates a tiling grid of the integrated circuit and routes connection nets between tiles within this grid. The system then selects an area within the integrated circuit larger than a tile in the first grid. The system creates a second grid of tiles smaller than the tiles of the first grid within this selected area. During this process, connection nets are routed between tiles on the second grid while routings within the first grid are maintained. The system merges connection nets within the first grid with connection nets within the second grid to form the global routing.

Method and apparatus to facilitate global routing for an integrated circuit layout

Provided is a data structure containing wiring information for an integrated circuit and a method for storing the same in a computer readable medium. In one embodiment of the present invention storage of the data structure is achieved by mapping said integrated circuit into memory locations of said medium as a wiring plane having a plurality of data points arranged in a grid. Each of the plurality of data points having state information associated therewith, which includes a plurality of attributes. Subsections of the grid are associated with memory locations in the computer readable medium to form a plurality of tiles. Specifically the tiles and data points are arranged so that a sub-portion of the data points associated with one of the plurality of tiles have common attributes.

Data structure for fine-grid multi-level VLSI routing and method for storing the data structure in a computer readable medium

A method for performing a static timing analysis on an integrated circuit chip or module taking into account the effect of wiring interconnection coupling is described. The wiring interactions are modeled as appropriate equivalent grounded capacitances, allowing traditional delay calculation methods to be applied. The method includes the steps of assigning a pessimistic value to the wiring coupling interaction between nets forming the integrated circuit chip; performing the static timing analysis using computed timing parameters which are a function of net capacitance, the net capacitance being based on the pessimistic value of the coupling interaction between the nets; updating the net capacitance of selected nets based on 1) an overlap between an arrival time window of each of the selected nets and a possible arrival time window of each of the other nets which are coupled to the each of selected nets, and 2) on the slew of each of the selected nets and the slew of each of the other nets which are coupled to the selected nets; and updating the static timing analysis based on the updated net capacitances of the selected nets.

Method for handling coupling effects in static timing analysis

Disclosed is a method for pre-design estimation of coupling noise and avoidance of coupling noise failures in interconnects. An initial routing of a plurality of nets is estimated utilizing global paths. Then, the worst-case and average-case models for various parameters of each net are evaluated. With these models, a noise analysis is completed by which a determination is made whether coupling noise of any one of the nets is above a threshold level for noise-induced failure (i.e., a noise-failure threshold). When it is determined that the estimated coupling noise of a net falls below the noise-failure threshold, a response mechanism is triggered for later implementation during detailed routing of the nets to prevent the coupling noise from reaching the noise-failure threshold.

Coupled noise estimation and avoidance of noise-failure using global routing information

Adjacent signal lines within the critical path of logic within an integrated circuit are checked for capacitive coupling induced signal delay variations resulting from concurrent signal transitions. When found, signal transition overlap is eliminated by delaying the clock edge (rising or falling) triggering the signal driving logic, without necessarily delaying the other clock edge. A delay circuit is incorporated into clock stages for the signal driving logic, and may be selectively actuated to delay the clock edge to particular signal driving logic circuits. Selection of signal lines in which signal transitions are to be delayed may be performed after manufacture of the integrated circuit, and iterative determinations may be required since signal adjustment may create new critical paths within the integrated circuit logic. Once the final signal adjustment configuration is determined, that configuration may be stored as a vector within a memory in the integrated circuit and read during power-up into a scan chain controlling the individual delay circuits.

Post-manufacture signal delay adjustment to solve noise-induced delay variations

A method, system and apparatus is provided to perform noise analysis of electrical circuits. The method and system partitions an original multi-port circuit to a reduced circuit model having a specific layout configuration. The reduced circuit model may have a variety of configurations. Then an input signal is applied to a first port of the reduced circuit model using the specific layout configuration and an output signal is measured from a second port of the reduced circuit model. The process continues until all input ports which may contribute noise to the circuit are measured and then the results are calculated to determine the total output of simulated noise experienced by the circuit. The calculated output results of the reduced circuit model are then used to determine whether the original circuit is designed to withstand the quantity of noise experienced by the reduced circuit model.

Method and system to improve noise analysis performance of electrical circuits

This invention reduces pessimism in cross talk analysis of digital circuits by combining only the peak noises from aggressor nets that can switch simultaneously during the time interval when the downstream receiving latch can sample the errant data. This is done by, first, determining aggressor switching windows and victim sensitivity windows. These windows are then used to determine which combination of noise sources can temporally align so as to cause the greatest noise within the victim sensitivity window.

Windowing mechanism for reducing pessimism in cross-talk analysis of digital chips

A method for timing and noise analysis in designing data processing chips is provided. The process begins by wiring all unconnected nets in the design and then using a 2&frac12; D capacitance extraction technique built into a detailed router to extract all of the wired nets. The data from the extracted nets is then process using a timing and analysis tool. Optimization programs are then used to generate fixes for any nets in the design which contribute to timing and noise failures. The present invention gives designers the capability of fast and accurate interconnect extraction within the routing tool. In addition, this technique is incremental. Any wiring changes can be quickly re-extracted, since only local information is required for extraction. This incremental capability allows designers to perform quick iterations of wiring, extraction and timing analysis.

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Austin, TX, United States of America

Sharad Mehrotra