Gigadevice Semiconductor Inc.

Shaoxu Jia

Miao Xie

The present disclosure discloses a random access memory and a sense-amplifying (SA) compensation circuit thereof. The SA compensation circuit includes: a SA module, connected between a target bit line and a complementary bit line, and connected to SA voltage lines; an offset cancellation module, connected between the target bit line and the SA module and connected between the complementary bit line and the SA module; and a drive module, configured to be connected to the SA voltage line and configured to drive the SA voltage line in the offset cancellation stage and a sensing stage; wherein, the drive module is adjustable and is configured to drive the SA voltage line in an adjustable manner during the offset cancellation stage, to adjust driving capabilities of the SA voltage line to perform the offset cancellation operation.

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Beijing, China

Shaoxu Jia