Cambricon Technologies Corporation Limited

Shanghai Cambricon Information Technology Co., Ltd

Chinese Academy of Sciences

Cambricon (xi'an) Semiconductor Co., Ltd.

Beijing Institute of Technology

Guangzhou University

Sanghai Cambricon Information Technology Co., Ltd.

Shaoli Liu

Tianshi Chen

Yunji Chen

Yao Zhang

Bingrui Wang

Shuai Hu

Xinkai Song

Qi Guo

Tian Zhi

Xiaofu Meng

Zai Wang

Xiao Lin Zhang

Jun Liang

Zidong Du

Tao Luo

Jinhua Tao

Shijin Zhang

Daofu Liu

Yimin Zhuang

Zhen Li

Dong Han

Xuda Zhou

Xishan Zhang

Yu Chen

Shengyuan Zhou

Huiying Lan

Yuzhe Luo

Jiaming Guo

Lei Zhang

Cheng Qian

Xiaoyong Zhou

Hongbo Zeng

Yifan Hao

Yongwei Zhao

Wei Li

Guang Jiang

Xiaobing Chen

Chang Liu

Jianhua Liu

Di Huang

Xiaoyu Ding

Jie Wei

Xiaobin Chen

Zhibin Guo

Naijing Lv

Jiashun Liu

Haili Lin

Jiangtao Ma

Enhe Liu

Yubin Shen

Hanzhao Zhu

The present disclosure relates to a learning task compiling method of artificial intelligence processors and related products. The learning task compiling method of artificial intelligence processors includes fusing a redundant neural network layer to a convolution layer, optimizing a structure of a convolution neural network, and compiling a learning task of an artificial intelligence processor based on the optimized convolution neural network. The method may achieve high efficiency for learning task compiling of artificial intelligence processors, and may reduce data exchange during processing when being executed on a device.

Learning task compiling method of artificial intelligence processor and related products

A computing apparatus may be included in a combined processing apparatus. The combined processing apparatus may further include a general interconnection interface and other processing apparatus. The computing apparatus interacts with other processing apparatus to jointly complete a computing operation specified by a user. The combined processing apparatus may further include a storage apparatus. The storage apparatus is connected to the apparatus and other processing apparatus, respectively. The storage apparatus is used to store data of the apparatus and other processing apparatus. Efficiency of various operations in data processing fields including, for example, an artificial intelligence field can be improved so that overall overheads and costs of the operations can be reduced.

Computing apparatus, integrated circuit chip, board card, electronic device, and computing method

The present disclosure provides a data processing apparatus and related products. The products include a control module including an instruction caching unit, an instruction processing unit, and a storage queue unit. The instruction caching unit is configured to store computation instructions associated with an artificial neural network operation; the instruction processing unit is configured to parse the computation instructions to obtain a plurality of operation instructions; and the storage queue unit is configured to store an instruction queue, where the instruction queue includes a plurality of operation instructions or computation instructions to be executed in the sequence of the queue. By adopting the above-mentioned method, the present disclosure can improve the operation efficiency of related products when performing operations of a neural network model.

Data processing apparatus and related products

Provided are an integrated circuit chip apparatus and a related product, the integrated circuit chip apparatus being used for executing a multiplication operation, a convolution operation or a training operation of a neural network. The present technical solution has the advantages of a small amount of calculation and low power consumption.

Integrated circuit chip apparatus

The present application relates to an operation device and an operation method. The operation device includes a plurality of operation modules. The plurality of operation modules complete an operation of a network model by executing corresponding computational sub-commands in parallel. Each operation module includes at least one operation unit configured to execute a first computational sub-command using first computational sub-data; and a storage unit configured to store the first computational sub-data. The first computational sub-data includes data needed for executing the first computational sub-command. The embodiments of the present application reduces bandwidth requirements for data access and reduces computation and equipment costs.

Parallel processing of network model operations

The present application relates to a network-on-chip data processing method. The method is applied to a network-on-chip processing system, the network-on-chip processing system is used for executing machine learning calculation, and the network-on-chip processing system comprises a storage device and a calculation device. The method comprises: accessing the storage device in the network-on-chip processing system by means of a first calculation device in the network-on-chip processing system, and obtaining first operation data; performing an operation on the first operation data by means of the first calculation device to obtain a first operation result; and sending the first operation result to a second calculation device in the network-on-chip processing system. According to the method, operation overhead can be reduced and data read/write efficiency can be improved.

Network-on-chip data processing method and device

An integrated circuit chip apparatus and a processing method performed by an integrated circuit chip apparatus are disclosed. The disclosed integrated circuit chip apparatus and processing method are used for executing a multiplication operation, a convolution operation, or a training operation of a neural network. The present technical solution has the advantages of a reduced computational cost and low power consumption.

The application provides an operation method and device. Quantized data is looked up to realize an operation, which simplifies the structure and reduces the computation energy consumption of the data, meanwhile, a plurality of operations are realized.

Processing method and device, operation method and device

The present disclosure provides a data processing method and an apparatus and a related product for increased efficiency of tensor processing. The products include a control module including an instruction caching unit, an instruction processing unit, and a storage queue unit. The instruction caching unit is configured to store computation instructions associated with an artificial neural network operation; the instruction processing unit is configured to parse the computation instructions to obtain a plurality of operation instructions; and the storage queue unit is configured to store an instruction queue, where the instruction queue includes a plurality of operation instructions or computation instructions to be executed in the sequence of the queue. By adopting the above-mentioned method, the present disclosure can improve the operation efficiency of related products when performing operations of a neural network model.

Data processing method and apparatus, and related product for increased efficiency of tensor processing

The present disclosure discloses a neural network processing module, in which a mapping unit is configured to receive an input neuron and a weight, and then process the input neuron and/or the weight to obtain a processed input neuron and a processed weight; and an operation unit is configured to perform an artificial neural network operation on the processed input neuron and the processed weight. Examples of the present disclosure may reduce additional overhead of the device, reduce the amount of access, and improve efficiency of the neural network operation.

Neural network calculation apparatus and method

A fractal computing device according to an embodiment of the present application may be included in an integrated circuit device. The integrated circuit device includes a universal interconnect interface and other processing devices. The calculating device interacts with other processing devices to jointly complete a user specified calculation operation. The integrated circuit device may also include a storage device. The storage device is respectively connected with the calculating device and other processing devices and is used for data storage of the computing device and other processing devices.

Fractal calculating device and method, integrated circuit and board card

Disclosed are an information processing method and a terminal device. The method comprises: acquiring first information, wherein the first information is information to be processed by a terminal device, calling an operation instruction in a calculation apparatus to calculate the first information so as to obtain second information, and outputting the second information. By means of the examples in the present disclosure, a calculation apparatus of a terminal device can be used to call an operation instruction to process first information, so as to output second information of a target desired by a user, thereby improving the information processing efficiency. The present technical solution has advantages of a fast computation speed and high efficiency.

Information processing method and system

The technical solution involves a board card including a storage component, an interface apparatus, a control component, and an artificial intelligence chip. The artificial intelligence chip is connected to the storage component, the control component, and the interface apparatus, respectively; the storage component is used to store data; the interface apparatus is used to implement data transfer between the artificial intelligence chip and an external device; and the control component is used to monitor a state of the artificial intelligence chip. The board card is used to perform an artificial intelligence operation.

Neural network quantization parameter determination method and related products

Growing community of inventors

Beijing, China

Shaoli Liu