Dell Products Inc.

Dell USA L P

Shaojie Li

Frank L Wu

Truc M Nguyen

George Mathew

The present disclosure describes a system and method for testing component IC chips. The system includes a management controller that has an embedded JTAG test routine operable to test one or more component IC chips associated with the management controller. The system further includes a memory associated with the management controller and the management controller is further operable to save a JTAG test routine result within the memory. More specifically, the management controller is operable to test one or more associated component IC chips using the embedded JTAG test routine during boot up of the system.

System and method for testing component IC chips

A first data bus is coupled to communicate information from a subsystem for sensing operating parameters of peripheral components to a computer system. A second data bus is coupled to communicate data between peripheral components and the computer system. A first switch is coupled between the first data bus and the second data bus, the first switch being operable to allow signals from the first data bus to be communicated over the second data bus when operating power to the computer system is powered off. A second switch is coupled between the second data bus and the peripheral components, and the second switch is operable to allow signals from the second data bus to be communicated to the computer system when operating power to the computer system is powered on.

System and method to support out-band storage subsystem management via SCSI bus when operating power to a computer system is off

Methods and system for providing selectable initialization sequences are disclosed. The method of initializing a system includes providing at least one reference associated with a device coupled to the system. A user selects the reference associated with the device and an initialization sequence is determined based upon the selected reference.

System and methods for providing selectable initialization sequences

A shared data storage subsystem having a system controller embedded in a backplane of the shared data subsystem. The system controller monitors the TERMPWR signals of SCSI server busses physically coupled to the shared data subsystem to operably couple and isolate a server SCSI bus with the share data subsystem SCSI bus provides. The system can be used to isolate a server from a data storage subsystem without affecting the operation of other servers operably coupled to the data storage subsystem. The servers and shared data subsystem are implemented in a cluster system. The system controller also monitors environmental conditions of the shared data subsystem. The shared data subsystem includes a plurality of data storage devices such as hard disk drives which can be organized in a RAID configuration.

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Austin, TX, United States of America

Shaojie Li