Signify Holding B.v.

Bcd Semiconductor Manufacturing Limited

Shanghai Sim-Bcd Semiconductor Manufacturing Co., Ltd.

Shaohua Peng

Bernd Clauberg

Yuhong Fang

Xuguang Zhang

Zutao Liu

An LED power supply, comprising: a power factor correction circuit configured to receive an input signal and provide a DC bus voltage across a DC bus; a converter configured to receive the DC bus voltage and to output a DC output voltage for powering at least one LED, wherein the converter comprises a high-side transistor, wherein the high-side transistor is OFF when the LED power supply is in standby; a voltage sensor being configured to output a voltage sensor output; and a controller configured to receive the voltage sensor output and to output a control signal according to the voltage sensor output, wherein the voltage sensor is positioned in series with the output of the high-side transistor, such that, when the high-side transistor is ON, the voltage sensor output is proportional to the DC bus voltage, and when the transistor is OFF, the voltage sensor is disconnected from the DC bus.

System and method for detecting a DC bus voltage while minimizing power loss in standby mode

A signal processing circuit includes a first circuit coupled between a power terminal and a first ground terminal and a second circuit coupled between the power terminal and a second ground terminal. The signal processing circuit is configured to receive a first signal at a voltage level relative to the first ground terminal and, in response to the first signal, provide a second signal at a voltage level relative to the second ground terminal. The signal processing circuit can be used in a battery protection circuit for a mobile device having an embedded battery. The battery protection circuit is configured with two NMOS transistors to allow the cell phone circuit to switch between the embedded battery and an external power source.

Embedded battery protection system

A voltage reference circuit includes a first enhancement-mode PMOS transistor, a first enhancement mode NMOS transistor, and a first depletion-mode PMOS transistor coupled in series between a voltage supply and a ground. A second depletion-mode PMOS transistor is coupled to the first enhancement PMOS transistor to form a feedback circuit. A first resistive device is coupled between the voltage supply and the second depletion-mode PMOS transistor, and a second resistive device is coupled between the second depletion-mode PMOS transistor and the ground. A bias circuit is coupled to a gate of the first enhancement-mode NMOS transistor. The first enhancement-mode PMOS transistor and the first depletion-mode PMOS transistor are configured to operate in saturation region. A first reference voltage across the first resistor and a second reference voltage across the second resistor are configured to be independent of the magnitude of the voltage supply and have low temperature drift.

Growing community of inventors

Shanghai, China

Shaohua Peng