United Microelectronics Corp.

Taiwan Semiconductor Manufacturing Comp. Ltd.

Shao-Ta Hsu

Teng-Chun Tsai

Neng-Kuo Chen

Chien-Chung Huang

Shyh-Fann Ting

Cheng-Tung Huang

Tzyy-Ming Cheng

Wen-Han Hung

Kun-Hsien Lee

Li-Shian Jeng

Ying-Lang Wang

Miao-Cheng Liao

Kuo-Hsien Cheng

Cheng-Chao Lin

Chao-Lon Yang

A method of manufacturing a MOS transistor device is provided. First, a semiconductor substrate having a gate structure is prepared. The gate structure has two sidewalls and a liner on the sidewalls. Subsequently, a stressed cap layer is formed on the semiconductor substrate, and covers the gate structure and the liner. Next, an activating process is performed. Furthermore, the stressed cap layer is etched to be a salicide block. Afterward, a salicide process is performed to form a silicide layer on the regions that are not covered by the stressed cap layer.

Method of forming metal-oxide-semiconductor transistors

A method for filling silicon oxide materials into a trench includes providing a substrate having a plurality of trenches, performing a first deposition process to form a first silicon oxide layer in the trenches, and performing a second deposition process to form a second silicon oxide layer in the trenches. The reactant gas of the first deposition process has a first O/TEOS flow ratio larger than a second O/TEOS flow ratio of the reactant gas of the second deposition process.

STI of a semiconductor device and fabrication method thereof

A method of manufacturing a MOS transistor device. First, a semiconductor substrate having a gate structure is prepared. The gate structure has two sidewalls and a liner on the sidewalls. Subsequently, a stressed cap layer is formed on the semiconductor substrate, and covers the gate structure and the liner. Next, an activating process is performed. Furthermore, the stressed cap layer is etched to be a salicide block. Afterward, a salicide process is performed to form a silicide layer on the regions that are not covered by the stressed cap layer.

Metal-oxide-semiconductor transistor and method of forming the same

A method of forming a contact is provided. A substrate having at least two conductive devices is provided. A spacing is located between the two conductive devices. A first dielectric layer is formed over the substrate to cover the two conductive devices and the spacing. A seam is formed in the first dielectric layer within the spacing. Then, a portion of the first dielectric layer is removed to form an opening so that the width of the seam is expanded. A second dielectric layer is formed over the first dielectric layer to fill the opening. A portion of the second dielectric layer and a portion of the first dielectric layer within the spacing are removed until a portion of the surface of the substrate is exposed and a contact opening is formed in the location for forming the contact. Finally, conductive material is deposited to fill the contact opening.

Method of forming contact

A seamless trench fill method utilizing ozone-assisted sub-atmospheric pressure chemical vapor deposition (SACVD) technique is provided. After the deposition of a SACVD silicon oxide film, the substrate is subjected to a steam anneal that is performed under H/Oenvironment at a relatively lower temperature ranging between 500&#xb0; C. and 800&#xb0; C. for a time period of no less than 30 minutes. The seam defect in the trench is effectively eliminated by this low-temperature steam anneal. To densify the SACVD silicon oxide film, a subsequent Nanneal is carried out at a higher temperature, for example, 1050&#xb0; C.

Seamless trench fill method utilizing sub-atmospheric pressure chemical vapor deposition technique

An MIM structure and method for forming the same the method including forming a bottom conductive electrode overlying a semiconducting substrate; forming a first protection layer on the conductive electrode; forming a dielectric layer on the first protection layer; and, forming an upper conductive electrode on the dielectric layer to form a metal-insulator-metal (MIM) structure.

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Tai-Nan, Taiwan

Shao-Ta Hsu