Macronix International Co., Ltd.

Shao-Chi Chen

Shih-Yu Wang

Jung Chuan Ting

Methods, systems and apparatus for memory devices with discharging circuits are provided. In one aspect, a semiconductor device includes a semiconductor substrate, one or more discharging circuits arranged on the semiconductor substrate, one or more common source line (CSL) layers conductively coupled to the one or more discharging circuits, and a memory array having a three-dimensional (3D) array of memory cells arranged in a plurality of vertical channels on the one or more CSL layers. Each of the plurality of vertical channels includes a respective string of memory cells, and each of the one or more CSL layers is conductively coupled to corresponding strings of memory cells. Each of the one or more discharging circuits includes one or more transistors that are disabled by one or more corresponding conductive lines through the memory array.

Growing community of inventors

Taoyuan, Taiwan

Shao-Chi Chen