Qualcomm Incorporated

ShankarGanesh Kandasamy

Subodh Singh

Sankaran Nampoothiri

Avinash Philip

Certain aspects of the present disclosure provide techniques for increasing processor caching efficiency by cache data pattern optimization. One embodiment includes a method for managing data in a cache, including: receiving data to be cached at the cache; determining that the data to be cached matches a predefined data pattern; and updating a tag RAM associated with the cache with a pattern tag comprising tag bits and pattern bits, wherein the pattern bits match the predefined data pattern.

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Bengaluru, India

ShankarGanesh Kandasamy