Shenzhen China Star Optoelectronics Technology Co., Ltd.

Wuhan China Star Optoelectronics Technology Co., Ltd.

Wuhan China Star Optoelectronics Co., Ltd.

Shangcao Cao

Yao Yan

Juncheng Xiao

Ronglei Dai

Chao Dai

Changyeh Lee

Chang Yeh Lee

The array substrate, the liquid crystal display panel and the liquid crystal display device of the present disclosure are designed to form the MIS storage capacitor by the P&#x2014;Si semiconductor layer, the first metal layer and the insulating layer between above or the P&#x2014;Si semiconductor layer, the second metal layer and the dielectric spacer layer between above, when one side of the first metal layer or the second metal layer receiving the negative gray voltage, the P&#x2014;Si in the P&#x2014;Si semiconductor layer will gather to form the hole, when receiving the positive gray voltage, will form the depletion layer on the upper layer of the P&#x2014;Si to reduce the capacity of the MIS storage capacitor, thereby reducing the difference of the capacitance when the MIS storage capacitor in the positive and negative gray voltage, improving the flicker phenomena and ensuring the display effect.

Array substrate, liquid crystal display panel and liquid crystal display device

The invention provides an array substrate and a liquid crystal display panel, by means of that colored photoresist layers of different colors disposed above metal wires are overlapped with each other to thereby form an opaque light shielding layer covering the metal wires so as to replace a black matrix, and therefore there is no need of a mask process for preparing the black matrix, so that it could reduce types and numbers of used masks, simplify manufacturing process and reduce production costs.

Array substrate and liquid crystal display pane

The present disclosure relates to a substrate and a liquid crystal display. The substrate includes a plurality of data lines, scanning lines, and pixel cells arranged in a matrix. Each of the pixel cells includes a first sub-pixel and a second sub-pixel. For the pixel cells in each row, a first sub-pixel of a pixel cell connects with the two scanning lines. The second sub-pixel of the pixel cell connects with one of the scanning line. When the pixel cells are driven, durations of the turn-on signals outputted by the two scanning lines connected with the pixel cell are different or the turn-on signals are asynchronous. As such, a turn-on period of the second sub-pixel of the pixel cell connecting with the data line is longer than the turn-on period of the first sub-pixel connecting with the corresponding data line. In this way, the color shift may be reduced.

Substrates and liquid crystal displays

The array substrate, the liquid crystal display panel and the liquid crystal display device of the present disclosure are designed to from the MIS storage capacitor by the P-Si semiconductor layer, the first metal layer and the insulating layer between above or the P-Si semiconductor layer, the second metal layer and the dielectric spacer layer between above, when one side of the first metal layer or the second metal layer receiving the negative gray voltage, the P-Si in the P-Si semiconductor layer will gather to form the hole, when receiving the positive gray voltage, will form the depletion layer on the upper layer of the P-Si to reduce the capacity of the MIS storage capacitor, thereby reducing the difference of the capacitance when the MIS storage capacitor in the positive and negative gray voltage, improving the flicker phenomena and ensuring the display effect.

A GOA circuit, a display device, and a driving method of GOA circuit are disclosed. A N-th level GOA unit is configured for charging the N-th level horizontal scanning line (G(N)) within a display area of the display device. The N-th level horizontal scanning line (G(N)) connects to GAS. In response to the GAS, the horizontal scanning lines corresponding to all of the GOA units are in a charging state. In this way, the horizontal scanning lines at each level are connected to the GAS, such that when the GAS are valid, the corresponding horizontal scanning line at each level are in the charging state of in an on-state so as to realize the All Gate On function.

GOA circuits, display devices and the driving methods of the GOA circuits

The present invention provides a GOA drive circuit and embedded type touch display panel. The GOA drive circuit comprises GOA units cascade coupled in multilevel, the nth level GOA unit comprises an output end pull down unit and an output control unit, both the output end pull down unit and the output control unit are employed to control a signal outputted by an output end of the nth level GOA unit, and one end of the output end pull down unit is coupled to a first end point, the first end point is loaded with a first signal, and one end of the output control unit is coupled to a nth clock signal, and as the embedded touch display panel enters signal interrupt and performs a touch scan, the output control unit is off to cut off an output path that the nth clock signal outputs to the output end.

GOA drive circuit and embedded type touch display panel

A gate on array (GOA) circuit for used in an LCD includes GOA units connected in cascade. An Nth GOA unit includes an Nth stage-transmittance circuit, an Nth Q-node controlling circuit, an Nth P-node controlling circuit, an Nth outputting circuit, and a first switch circuit where N is a positive integer. The first switch circuit connected to the Nth scanning line, for inputting an enabling signal to the Nth scanning line before the LCD shows images so as to turn on a TFT in a pixel which the Nth scanning line is connected to. The benefit of the function is that the display does not leak electricity when the black screen is woken up and that the stability of the circuit is enhanced at the same time.

GOA circuit and method for driving the same and LCD

The array substrate, the liquid crystal display panel and the liquid crystal display device of the present disclosure are designed to from the MIS storage capacitor by the P&#x2014;Si semiconductor layer, the first metal layer and the insulating layer between above or the P&#x2014;Si semiconductor layer, the second metal layer and the dielectric spacer layer between above, when one side of the first metal layer or the second metal layer receiving the negative gray voltage, the P&#x2014;Si in the P&#x2014;Si semiconductor layer will gather to form the hole, when receiving the positive gray voltage, will form the depletion layer on the upper layer of the P&#x2014;Si to reduce the capacity of the MIS storage capacitor, thereby reducing the difference of the capacitance when the MIS storage capacitor in the positive and negative gray voltage, improving the flicker phenomena and ensuring the display effect.

The disclosure provides a GOA circuit, a driving method thereof and a liquid crystal display device. The GOA circuit comprises a plurality of GOA units connected in cascade, wherein the N-stage GOA unit comprises a N-stage stage circuit, a N-stage Q point control circuit, a N-stage P point circuit, a N-stage output circuit and a switch circuit. The switch circuit is connected to the N-stage scan line for sending a turn-on signal to the N-stage scan line before the liquid crystal display device displays an image such that the thin-film transistor in the pixel connected to the N-stage scan line turns on. The disclosure may turn on the gate of each pixel when the display device is waken from the black screen to prevent the electricity leakage when the display device is wakened from the black screen, and may also increase the stability of the circuit.

GOA circuit, driving method thereof and liduid crystal display device

The invention discloses a common circuit for GOA test and eliminating power-off residual images, including a first test end (), a test signal line (AT) connected to the first test end (), a second test end (), a feedback signal line (AT) connected to the second test end (), and the same number of test TFTs (T) as cascade GOA unit circuits. By connecting the gate of each test TFT (T) to test signal line (AT), the source to feedback signal line (AT) and the drain to the output end of corresponding GOA unit circuit and gate scan line, the invention can test the output signal of any stage GOA unit circuit to determine the location of a malfunctioning GOA unit circuit, and releasing the residual charges of the liquid crystal capacitor and storage capacitor at the display area of LCD panel when powering off to eliminate residual images.

Common circuit for GOA test and eliminating power-off residual images

A display device, a TFT substrate and a GOA driving circuit are disclosed. An driving unit of the GOA driving circuit includes an input module for outputting a first control signal according to the signals received; an output module for outputting a first output control signal according to a first control signal and a first clock signal; a pull-down module for outputting a pull-down signal according to the first control signal, a second clock signal and a low voltage level signal; and a pull-down maintaining module for outputting a second output control signal according to the pull-down signal, a high voltage level signal and the first clock signal. The first output control signal and the second output control signal act commonly in order to obtain an output signal. The GOA driving circuit can perform a pause or a stage transferring.

Display device, TFT substrate and GOA driving circuit

The present invention provides a gate driving circuit, of which respective odd stage GOA unit circuits are cascade connected, and respective even stage GOA unit circuits are cascade connected; the odd stage first, second scan control signals (Vf, Vr), the odd stage scan start signal (STV), the odd stage first, second high frequency clock signals (CK1, CK2) are located corresponding to the odd stage GOA unit circuits; the even stage first, second scan control signals (Vf, Vr), the even stage scan start signal (STV), the even stage first, second high frequency clock signals (CK1, CK2) are located corresponding to the even stage GOA unit circuits; by controlling the voltage levels of the odd stage first, second scan control signals (Vf, Vr) and even stage first, second scan control signals (Vf, Vr) in cooperation with the odd stage scan start signal (STV) and the even stage scan start signal (STV) of different sequences, the odd stage GOA unit circuits and the even stage GOA unit circuits can be controlled to perform forward scan or backward scan at the same time or in time division.

Gate driving circuit

The present invention provides a GOA circuit, comprising a forward-backward scan control module, an output module, an output pull-down module, a node control module, a second node signal input module, a second node signal control module, a voltage stabilizing module and a second capacitor; the forward scan of the circuit is controlled with the ninth and the tenth thin film transistors, and the signal input of the second node is controlled with the first and the eleventh thin film transistors, and the mutual control of the first node and the second node are achieved with the second, the fourth and the fifth thin film transistors, and meanwhile, as the GOA circuit applies to a display of dual side drive interlaced scan structure, the GOA circuits of the two sides can respectively receive four different clock signals to reduce the loading of the signal line of the GOA circuit.

GOA circuit

A gate driver includes a plurality of gate driver units. Each of the gate driver units includes a GOA driving circuit and at least one buffer GOA driving circuits at multiple levels. The GOA driving circuit outputs output signals during a display stage, wherein the output signals are transmitted to gate lines and the buffer GOA driving circuits at multiple levels. The output signals are transmitted between the levels when the buffer GOA driving circuits at the multiple levels are during a touch stage, and the output signals are transmitted to the GOA driving circuit of the driving unit at the next level. In addition, a touch panel includes the above gate driver.

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Guangdong, China

Shangcao Cao