Unistars Corporation

Young Optics Inc.

Other

Xintec Corporation

Shang-Yi Wu

Hsin-Hsien Hsieh

Tien-hao Huang

Yi-chun Wu

Chia-Lun Tsai

Chu-Ming Cheng

Wen-Cheng Chien

Chien-Hui Chen

Tien-Hao Huang

Liang-Kuei Huang

Tsang-Yu Liu

Yi-Chang Chen

Ching-Yu Ni

Hsien-Kuang Chiu

Hsin-Chang Wu

Jyh-Horng Shyu

Cheng-Te Chou

Chien-Yi Chen

Tien-Pao Chen

Shin-Shien Shie

Hsin-Hsie Lee

Pao-Ya Wang

An optoelectronic package includes a carrier, a light emitting die, a cover, and an encapsulation material. The carrier has a carrying plane and a wiring layer on the carrying plane. The light emitting die is mounted on the carrying plane and electrically connected to the wiring layer. The cover is connected to carrier. A cavity is formed between the cover and the carrier, and the light emitting die is within the cavity. The encapsulation material formed on the carrier surrounds the cover. The encapsulation material completely covers the interface between the cover and carrier.

Optoelectronic package with a low water vapor transmission rate (WVTR) and method for fabricating the same

An optoelectronic package includes a wiring substrate having a holding plane, an optoelectronic chip, a reflective material, an optical element and an adhesive. The optoelectronic chip is mounted on the holding plane and electrically connected to the wiring substrate. The optoelectronic chip has an upper surface, a functional region and a side surface connected to the upper surface. The reflective material is on the holding plane and surrounds the optoelectronic chip. The reflective material covers the side surface and has an inclined surface. The inclined surface surrounds the upper surface and extends from an edge of the upper surface. The height of the reflective material at the inclined surface decreases from the optoelectronic chip toward a direction away from the optoelectronic chip. The adhesive covers the reflective material and the upper surface and is connected between the optoelectronic chip and the optical element.

Optoelectronic package

An optoelectronic package includes a substrate, a light emitting chip, an optical sealant, and an optical scattering layer. The substrate has a carrying plane and a wiring layer formed on the carrying plane. The light emitting chip used for emitting a light ray is mounted on the carrying plane and electrically connected to the wiring layer. The optical sealant covers the carrying plane and wraps the light emitting chip. The optical sealant is located in the path of the light ray. The optical scattering layer covers the optical sealant. The optical sealant located in the path of the light ray is formed between the substrate and the optical scattering layer. Preferably, the refractive index of the optical sealant is larger than or equal to the refractive index of the optical scattering layer.

A light emitting package base structure includes a carrier, a light emitting chip, a light transmission unit and a dam. The carrier has a supporting surface and an outer surface surrounding the supporting surface. The light emitting chip is disposed on the supporting surface and electrically connected to the carrier. The light transmission unit is disposed on the carrier and has a through hole. The dam is disposed between the carrier and the light transmission unit, and a hermetic receiving space is formed between the dam, the light transmission unit and the carrier. The light emitting chip is located in the hermetic receiving space and the dam has a side surface away from the hermetic receiving space. A gap is formed between the side surface and the outer surface, and the through hole is corresponded to a location between the side surface and the outer surface.

Light emitting package base structure

A light emitting device includes a carrier, a light emitting chip, and a covering part disposed on the carrier. The carrier includes a board, a guiding metal layer, and a sealing material. The board has a first surface, a second surface, and a through vent that is divided into a first partial hole and a second partial hole. The first partial hole extends from the first surface to the second partial hole, and the second partial hole extends from the second surface to the first partial hole. The guiding metal layer is formed on the second surface and in the second partial hole, and covers the sidewall of the second partial hole. The guiding metal layer extends from the second partial hole to the second surface, and does not cover the sidewall of the first partial hole and the first surface. The sealing material seals the second partial hole.

Light emitting device and method of manufacturing the same

A semiconductor structure and its manufacturing method including multiple steps are provided. First, a patterned circuit board having a substrate and a patterned circuit layer is provided. The substrate includes a first surface, a second surface, at least one connecting channel, and at least one conductive through hole, wherein patterned circuit layer is disposed on the first surface, a second surface, and the inside wall of the conductive through hole. Then, the patterned circuit board is disposed on a carrier, and the patterned circuit layer disposed on one of the first surface and the second surface is touched with the carrier. Then, a filling process is applied. A filling material flows to the conductive through hole via the first surface or the second surface from the connecting channel. Then, a package material is provided to produce a semiconductor structure.

Semiconductor construction, semiconductor unit, and manufacturing method thereof

LED packaging construction includes a substrate, a cavernous construction, a LED, and a reflection layer. The substrate is daubed with an insulation layer and a circuit layer on a surface on the substrate, wherein the substrate is made of metal, and the insulation layer is disposed between the circuit layer and the substrate. The cavernous construction is disposed on the substrate and surrounds the LED, and is formed by disposing a photoresist layer and patterning the photoresist layer. The circuit layer electrically connects the LED through a conducting wire. The reflection layer is at least disposed on a first surface of the cavernous construction, wherein the first surface surrounds the LED and faces toward the LED, and a part of light emitted from the LED is reflected by the reflection layer.

LED packaging construction and manufacturing method thereof

A semiconductor package structure and a manufacturing method thereof are provided. The semiconductor package structure includes a semiconductor die, a thermally conductive film, a substrate, a plurality of electrically conductive film patterns, and at least one insulator. The thermally conductive film is disposed on the bottom of the semiconductor die. The substrate is substantially comprised of the electrically conductive material or semiconductor material. Furthermore, a first hole is disposed on and passed all the way through the substrate, and the semiconductor die is disposed in the first hole. The electrically conductive film patterns are disposed on the substrate, and not contacting with each other. In addition, the insulator is connected between the semiconductor die and the substrate.

Semiconductor package structure and manufacturing method thereof

A substrate includes a die-bonding zone and a glue spreading pattern. The die-bonding zone is set to bond a die. The glue spreading pattern is placed in the die-bonding zone and includes a containing space. The die is placed on the glue spreading pattern, an area of a bottom of the die is greater than an area of an opening of the glue spreading pattern, the containing room of the glue spreading pattern is filled with a glue, and the die is bonded to the substrate by means of the glue.

Substrate, semiconductor construction, and manufacturing method thereof

A method for fabricating a silicon submount for LED packaging. A silicon substrate is provided. A reflection layer is formed on the silicon substrate. Portions of the reflection layer and the silicon substrate are removed to form openings. A wafer backside grinding process is carried out to thin the silicon substrate thereby turning the openings into through silicon vias. An insulating layer is then deposited to cover the reflection layer and the silicon substrate. A seed layer is formed on the insulating layer. A resist pattern is then formed on the seed layer. A metal layer is formed on the seed layer not covered by the resist pattern. The resist pattern is then stripped. The seed layer not covered by the metal layer is then removed.

High-reflection submount for light-emitting diode package and fabrication method thereof

A light emitting device package structure is described. The light emitting device package structure includes a substrate serving as a carrier supporting a light emitting device chip. The substrate and the light emitting device chip have a chip side and a substrate side separately. A first electrode layer is disposed on a first surface of the light emitting device chip and a second electrode layer is disposed on a second surface of the light emitting device chip, in which the first surface and the second surface are not coplanar. A first conductive trace is electrically connected to the first electrode layer and a second conductive trace is electrically connected to the second electrode layer. At least the first conductive trace or the second conductive trace is formed along the chip side and the substrate side simultaneously.

Light emitting device package structure and fabricating method thereof

An embodiment of the invention provides a package structure for chip. The package structure for chip includes: a carrier substrate having an upper surface and an opposite lower surface; a chip overlying the carrier substrate and having a first surface and an opposite second surface facing the upper surface, wherein the chip includes a first electrode and a second electrode; a first conducting structure overlying the carrier substrate and electrically connecting the first electrode; a second conducting structure overlying the carrier substrate and electrically connecting the second electrode; a first through-hole penetrating the upper surface and the lower surface of the carrier substrate and disposed next to the chip without overlapping the chip; a first conducting layer overlying a sidewall of the first through-hole and electrically connecting the first conducting electrode; and a third conducting structure overlying the carrier substrate and electrically connecting the second conducting structure.

Package structure for chip and method for forming the same

A light emitting diode package is provided, which includes a semiconductor substrate having a first surface and a second surface; at least a through-hole passing through the semiconductor substrate; a thermal via formed extending from the second surface toward the first surface of the semiconductor substrate, wherein the thermal via has a first end near the first surface and a second end near the second surface; an insulating layer overlying a sidewall of the through-hole and extending overlying the first surface and the second surface of the semiconductor substrate, wherein the insulating layer further covers at least one of the first end, the second end and a sidewall of the thermal via; a conducting layer overlying the insulating layer in the through-hole and extending to the first surface and the second surface of the semiconductor substrate; and an LED chip disposed overlying the semiconductor substrate.

Light emitting diode package and method for forming the same

A projection apparatus including an actuator, a light source, and a projection lens is provided. The light source is disposed on the actuator and is capable for emitting light beams sequentially. The actuator is capable for driving the light source so as to change the transmission paths of the light beams. The projection lens is disposed on the transmission paths of the light beams. The volume of the projection apparatus can be reduced since the light source is directly disposed on the actuator.

Growing community of inventors

Hsinchu, Taiwan

Shang-Yi Wu