Silicon Integrated Systems Corporation

Shang-Yi Chen

Chun-An Tu

Hao-Luen Tien

Ming-Huan Lu

A method for analyzing power noise and method for reducing the same are disclosed, wherein the present invention is utilized in an IC design process. First, a DC analysis is performed with a related IC design by utilizing computer aided design (CAD) software and circuit simulation software for obtaining a power network model of the IC design. Then, the power network model is defined as being composed of a plurality of unit blocks. After analysis, the quantity and type, etc., of components connected electrically to each of the unit blocks are recognized and are regarded as component reference data of each of the unit blocks. Afterwards, according to the component reference data of each of the unit blocks, the voltage drop (IR drop) occurring in operation for each of the unit blocks is evaluated and obtained by utilizing an equivalent circuit constructed by components that are connected electrically to each of the unit blocks. Therefore, the voltage consumption and distribution in each region of the power network model are obtained, so that at least one appropriate capacitor can be placed on proper locations of the power network model, to compensate the voltage drop caused by the IC design components while in operation, and to decrease the power noise in the IC design.

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Changhua, Taiwan

Shang-Yi Chen