Mediatek Corporation

Winbond Electronics Corporation

Shang-Tzu Ju

Chih-Hui Kuo

Ching-Chieh Wang

Wan-Yu Chen

Chi-Hui Wang

In a method of controlling multiple decoders in an optical disc player system to read encoded bitstream data divided into multiple sectors from a buffer memory, one of the sectors stored in the buffer memory is read according to a reading pointer associated with one of the decoders that sent out a bitstream request. When a header portion of the sector that is being read from the buffer memory indicates a bitstream type corresponding to that of the bitstream request, a data portion of the sector is transferred to the decoder that sent out the bitstream request, and the reading pointer is adjusted to point to a next one of the sectors stored in the buffer memory. An optical disc player system for implementing the method and an optical disc player system capable of saving the memory bandwidth between a bitstream demultiplexer and a memory are also disclosed.

Optical disc player system and method of controlling a decoding unit in the optical disc player system to read encoded bitstream data from a buffer memory

An image evaluation method for a digital camera includes analyzing the composition of an image for obtaining a characteristic of the composition of the image, computing an ideal characteristic value, a real characteristic value, and a difference value between the ideal characteristic value and the real characteristic value, and generating a grade according to the difference value to show quality related to the composition of the image.

Image evaluation method, image capturing method and digital camera thereof for evaluating and capturing images according to composition of the images

The present invention is related to a method of logic simulation performed by a simulator for solving the problem of the false unknown state. The method includes steps of defining a high potential state, a low potential state, an unknown state and an inverse unknown state for a plurality of nodes of a logic circuit, obtaining a plurality of truth tables according to the high potential state, the low potential state, the unknown state and the inverse unknown state, and achieving the logic simulation according to the plural truth tables.

Method of logic simulation

A compressing/decompressing apparatus comprising a receiver, a memory interface, a compressor and a decompressor is disclosed. The receiver receives a video graphics signal comprising a plurality of video graphics packets, each comprising a plurality of pixels. The memory interface is coupled between the frame buffer memory and the compressing and decompressing device as a data transfer interface. The compressor sequentially receives a video graphics packet of the video graphics signal, truncates a predetermined length of LSBs of each pixel in the video graphics packet to form a compressed video graphics signal comprising of a plurality of compressed video graphics packets, and stores the compressed video graphics signal in a frame buffer memory. The decompressor sequentially receives a compressed video graphics packet of the compressed video graphics signal, recovers each pixel of the compressed video graphics packet with an adjusted value of the predetermined length to form a decompressed video graphics signal comprising of a plurality of decompressed video graphics packets.

Compressing/decompressing apparatus and method to compress and

A maximum/minimum value determination apparatus for determining a maximum/minimum value between two digital signals includes two conversion modules each of which receives a first digital signal and a second digital signal and outputs a first analog signal and a second analog signal respectively, where the first analog signal and the second analog signal are respectively linearly related to the first digital signal and the second digital signal. A difference amplifier is connected to the two conversion modules for receiving the first analog signal and the second analog signal and outputting a selecting signal which is either a logical high signal or a logical low signal according to a difference between the first analog signal and the second analog signal. A first multiplexer is adapted to receive the first digital signal, the second digital signal, and the selecting signal and output a maximum of the first digital signal and the second digital signal according to the selecting signal. A second multiplexer adapted to receive the first digital signal, the second digital signal, and the selecting signal and output a minimum of the first digital signal and the second digital signal according to the selecting signal.

Growing community of inventors

Hsinchu, Taiwan

Shang-Tzu Ju