Taiwan Semiconductor Manufacturing Comp. Ltd.

Shang Lin Wu

Wei Min Chan

Chien-Chen Lin

Pei-Yuan Li

Wei-Cheng Wu

Kao-Cheng Lin

Chia-Che Chung

Yung-Ning Tu

Yen Lin Chung

Chien Hui Huang

Chia-Chi Hung

Hsiang-Yun Lin

A memory device is provided which includes a first memory cell including a first transistor and a second transistor coupled to the first transistor in parallel. Gates of the first transistor and the second transistor are coupled to each other, and the gates of the first transistor and the second transistor pass different layers and overlap with each other. Types of the first transistor and the second transistor are the same.

Memory device

Disclosed herein are related to memory device including an adaptive word line control circuit. In one aspect, the memory device includes a memory cell and a word line driver coupled to the memory cell through a word line. In one aspect, the memory device includes an adaptive word line control circuit including two or more diodes connected in series, where one of the two or more diodes is coupled to the word line.

Adaptive word line control circuit

Growing community of inventors

Hsinchu County, Taiwan

Shang Lin Wu