Industrial Technology Research Institute

Shang-Chun Chen

Cha-Hsin Lin

Tzu-Kun Ku

Yu-Chen Hsin

Sin-Jhu Wun

Chih-Lin Wang

Kai-Ning Ku

Wei-Yen Chen

A test device configured to test a photonic integrated circuit (IC) is provided. The photonic IC includes at least one waveguide edge coupler, and the test device includes an optical coupler. The optical coupler is configured to be optically aligned with the photonic IC, and includes at least one focusing lens and a first reflector. The at least one focusing lens is aligned with the at least one waveguide edge coupler. A light from the waveguide edge coupler is focused by the focusing lens, reflected by the first reflector, and transmitted to a fiber connector in sequence, or a light from the fiber connector is reflected by the first reflector and focused onto the waveguide edge coupler by the focusing lens in sequence. A heterogeneously integrated structure is also provided.

Test device and heterogeneously integrated structure

A silicon photonic package structure including a substrate, a conductive bump, an obstacle structure, a laser diode, a mode converter, and a ball lens is provided. The conductive bump is disposed on the substrate. The obstacle structure is formed on the substrate. The laser diode is disposed above the substrate and electrically bonded to the conductive bump. A surface of the laser diode facing the substrate has a ridge. An end of the ridge has a light-emitting surface. The obstacle structure is located between the conductive bump and the ridge. A thickness of the obstacle structure in a direction perpendicular to the surface of the substrate is greater than a thickness of the ridge in the direction perpendicular to the surface of the substrate. The mode converter is formed on the substrate. The ball lens is formed on the substrate and located between the light-emitting surface and a light input end of the mode converter.

Silicon photonic package structure

An optical measurement apparatus configured to measure a photonic integrated circuit (photonic IC) is provided. The optical measurement apparatus includes a substrate, at least one optical waveguide device, a first connector, and a second connector. The at least one optical waveguide device is disposed on the substrate. The first connector and the second connector are connected with the at least one optical waveguide device. An optical signal from a first optical fiber is transmitted to the at least one optical waveguide device through the first connector, transmitted to the inside of the photonic IC though at least one first evanescent coupler of the photonic IC, transmitted to the at least one optical waveguide device through at least one second evanescent coupler of the photonic IC, and transmitted to a second optical fiber through the second connector in sequence.

Optical measurement apparatus

An optical component optically coupled to an optical fiber includes a substrate and an edge-emitting laser. The substrate includes an accommodating cavity, a plurality of openings, a waveguide, an optical coupler and a plurality of pads. The waveguide and the optical coupler are distributed outside the accommodating cavity. The openings are distributed at the bottom surface of the accommodating cavity and the pads are located at the bottom of the openings. The optical coupler is optically coupled to an end of the waveguide and includes a light-incident surface. The edge-emitting laser is embedded in the accommodating cavity and includes a light-emitting layer and a plurality of bumps located in the openings and electrically connected to the pads. The ratio of the level height difference between the light-emitting layer and the optical coupler to the thickness of the optical coupler ranges from 0 to 0.5.

Optical component

A manufacturing method of a semiconductor device is provided. First, a mould is provided. The mould has a chamber, patterns in the chamber, and protrusions in the chamber. A carrier substrate having at least one die located thereon is disposed in the chamber, and the protrusions surround the die. A thermosetting material is injected into the chamber and is cured. The cured thermosetting material is separated from the mould, so as to form an interposer substrate. A plurality of through holes corresponding to the protrusions and a plurality of grooves corresponding to the patterns are formed on the interposer substrate. A conductive material is filled into the through holes and the grooves to form a plurality of conductive pillars and a first conductive pattern layer on a first surface of the interposer substrate. The first conductive pattern layer is electrically connected with the conductive pillars.

Semiconductor device and manufacturing method thereof

A method for fabricating a semiconductor device is provided. The method includes: providing a first wafer having a first active surface and a first rear surface opposite to the first active surface, the first wafer comprising a first circuit formed therein; providing a second wafer having a second active surface and a second rear surface opposite to the second active surface, the second wafer comprising a second circuit formed therein; bonding the first active surface of the first wafer with the second active surface of the second wafer so as to electrically connecting the first circuit and the second circuit; thinning the second wafer from the second rear surface; and forming at least a conductive through via in the second wafer, wherein the conductive through via is electrically connected to the first circuit through the second circuit.

Semiconductor structure and manufacturing method thereof

A semiconductor device and a manufacturing method thereof are provided. The manufacturing method includes following steps. A mold is provided. The mold has a chamber and a plurality of protrusions in the chamber. A thermosetting material is injected into the chamber. The thermosetting material is cured. A parting step is performed to separate the cured thermosetting material from the mold, so as to form an interposer substrate. A plurality of blind holes corresponding to the protrusions is formed on the interposer substrate. A conductive material is filled into the blind holes to form a plurality of conductive pillars. A conductive pattern layer is formed on a surface of the interposer substrate. The conductive pattern layer is electrically connected with the conductive pillars.

A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a substrate, a device layer and a least one conductive post. The substrate includes a first surface, a second surface opposite to the first surface, and at least one through hole penetrating the substrate. The substrate includes a first side wall portion and a second side wall portion at the through hole. The first side wall portion is connected to the first surface and includes a plurality of first scallops. The second side wall portion is connected to the second surface and includes a non-scalloped surface. The device layer is disposed on the second surface, and the second side wall portion of the substrate further extends into the device layer along the non-scalloped surface. The conductive post is disposed in the through hole, wherein the conductive post is electrically connected to the device layer.

Growing community of inventors

Hsinchu County, Taiwan

Shang-Chun Chen