Apple Inc.

Shang-Chih Lin

Ting-Kuo Chang

Shih Chang Chang

Hiroshi Osawa

Takahide Ishii

Chin-Wei Lin

Zhibing Ge

Shinya Ono

Ming-Chin Hung

Keisuke Omoto

Abbas Jamshidi Roudbari

Yu Cheng Chen

Yuan Chen

Cheng-Ho Yu

Shih-Chang Chang

Kyung Wook Kim

Jiun-Jye Chang

Ching-Sang Chuang

Yu-Cheng Chen

Cheng Kai Chen

Ming Xu

Tsung-Ting Tsai

Chaohao Wang

Paolo Sacchetto

Jean-Pierre Simon Guillou

Chun-Yao Huang

Hirokazu Yamagata

Young Bae Park

Prashant Mandlik

Shin-Hung Yeh

Jae Won Choi

Szu-Hsien Lee

Byung Duk Yang

Kyung-Wook Kim

Bhadrinarayana Lalgudi Visweswaran

Christopher Edward Glazowski

Abbas Jamshidi-Roudbari

Keitaro Yamashita

Majid Gharghi

Chia Hsuan Tai

Cheng-Chih Hsieh

Sang Un Choi

Han Liu

Daisuke Nozu

Shih-Chyuan Fan Jiang

Ton-Yong Wang

Themistoklis Afentakis

Hui Lu

Ankit Mahajan

Chia-hao Chang

David L Wei

Asli Sirman

Ko-Wei Chen

An electronic device may have a display such as an organic light-emitting diode display. The organic light-emitting diode (OLED) display may have an array of organic light-emitting diode pixels that each have OLED layers interposed between a cathode and an anode. A first passivation layer, a first planarization layer, and a second passivation layer may be formed over the cathode. The first and second passivation layers may be formed from inorganic material. A second planarization layer may be formed over the second passivation layer between the second passivation layer and a polarizer. The second planarization layer may planarize the polarizer at the edges of the active area of the display where the polarizer would otherwise have a steep taper. Planarizing the polarizer in this way mitigates undesirable secondary reflections off of the polarizer. The first and second planarization layers may be formed from organic material.

Organic light-emitting diode displays with planarization layers

An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels, that include hybrid thin-film transistor structures formed using semiconducting-oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. A drive transistor in the display pixel may be a top-gate semiconducting-oxide thin-film transistor and a switching transistor in the display pixel may be a top-gate silicon thin-film transistor. A storage capacitor in the display may include a conductive semiconducting-oxide electrode.

Displays with silicon and semiconducting-oxide top-gate thin-film transistors

Improvement of visual uniformity of an integrated touch screen display is provided. A touch screen can include common electrodes separated by gaps in a Vcom layer. To improve visual non-uniformity in the display resulting from the gaps, a first set of semi-transparent dummy features (primary-dummy features) can be formed on a second layer at the locations of the gaps, and a second set of dummy features (supplementary-dummy features) can also be formed on the second layer or another layer to mitigate low spatial resolution of the primary-dummy features and/or non-uniform spacing of the primary-dummy features. In some examples, holes or slits can be formed in the Vcom layer at areas of the supplementary-dummy features to further improve visual uniformity.

Touch screen display uniformity

A display may have a thin-film transistor layer formed from a layer of thin-film transistor circuitry on a substrate, a color filter layer, and a layer of liquid crystal material interposed between the thin-film transistor layer and the color filter layer. The thin-film transistor layer, the liquid crystal layer, and the color filter layer may be sandwiched between upper and lower polarizers. A backlight unit may supply backlight illumination for pixels in the display. The color filter layer may have a black matrix with an array of openings. Color filter elements of different colors may be formed in the openings. The black matrix may have sidewalls that are steep or that are undercut. The profile of the black matrix helps block improperly colored off-axis light and thereby reduces undesired color mixing in the display.

Display with reduced color mixing

A method is provided for fabricating thin-film transistors (TFTs) for an LCD having an array of pixels. The method includes depositing a first photoresist layer over a portion of a TFT stack. The TFT stack includes a conductive gate layer, and a semiconductor layer. The method also includes doping the exposed semiconductor layer with a first doping dose. The method further includes etching a portion of the conductive gate layer to expose a portion of the semiconductor layer, and doping the exposed portion of the semiconductor layer with a second doping dose. The method also includes removing the first photoresist layer, and depositing a second photoresist layer over a first portion of the doped semiconductor layer in an active area of the pixels to expose a second portion of the doped semiconductor layer in an area surrounding the active area. The method further includes doping the second portion of the doped semiconductor layer with a third doping dose, the first dose being higher than the second dose and the third dose.

Different lightly doped drain length control for self-align light drain doping process

A display may have upper and lower display layers. A layer of liquid crystal material may be interposed between the upper and lower display layers. The display layers may have substrates. The display layers may include a color filter layer having an array of color filter elements on a glass substrate and a thin-film transistor layer having a layer of thin-film transistor circuitry on a glass substrate. Dielectric layers within the display layers such as dielectric layers within the thin-film transistor layer may have differing indices of refraction. Reflections and color shifts due to index of refraction discontinuities may be minimized by interposing graded index dielectric layers between adjacent layers with different indices. The graded index layers may be formed from structures with a continuously varying index of refraction or structures with a step-wise varying index of refraction.

Liquid crystal displays with minimized transmission loss and enhanced off-axis color fidelity

A display may have a layer of liquid crystal material between a color filter layer and a thin-film transistor layer. Column spacer structures may be formed between the color filter layer and the thin-film transistor layer to maintain a desired separation between the color filter and thin-film transistor layers. Column spacers may be deposited in column spacer regions of the color filter layer. The color filter layer may include rows of red, green, and blue color filter elements. Blue color filter material that forms blue color filter elements in the color filter layer may also be used to form a planar surface over red and green color filter elements in the column spacer regions. Using the blue color filter material to planarize the surface on which column spacers are formed ensures that the column spacers provide sufficient support for the display without requiring an additional planarization layer.

Display with column spacer structures

A display may have upper and lower display layers. A layer of liquid crystal material may be interposed between the upper and lower display layers. The display layers may have substrates. A thin-film transistor layer may have a layer of thin-film transistor structures on a substrate such as a clear glass layer. A planarization layer may be formed on the thin-film transistor structures. A transparent conductive layer may be formed on the planarization layer. The display may have a dielectric layer on the transparent conductive layer. Pixels may be formed in the display layers. The pixels may include pixel electrodes having fingers. The fingers may be formed on the dielectric layer. Trenches in the dielectric layer may be formed between the fingers. The trenches may extend to the transparent conductive layer or may be formed only partway into the dielectric layer.

Low-flicker liquid crystal display

An electronic device may include a display having an array of display pixels on a substrate. The display pixels may be organic light-emitting diode display pixels or display pixels in a liquid crystal display. In an organic light-emitting diode display, hybrid thin-film transistor structures may be formed that include semiconducting oxide thin-film transistors, silicon thin-film transistors, and capacitor structures. The capacitor structures may overlap the semiconducting oxide thin-film transistors. Organic light-emitting diode display pixels may have combinations of oxide and silicon transistors. In a liquid crystal display, display driver circuitry may include silicon thin-film transistor circuitry and display pixels may be based on oxide thin-film transistors. A single layer or two different layers of gate metal may be used in forming silicon transistor gates and oxide transistor gates. A silicon transistor may have a gate that overlaps a floating gate structure.

Liquid crystal displays with oxide-based thin-film transistors

A display may have a color filter layer and a thin-film transistor layer. A layer of liquid crystal material may be located between the color filter layer and the thin-film transistor (TFT) layer. The TFT layer may include thin-film transistors formed on top of a glass substrate. A passivation layer may be formed on the thin-film transistor layers. A first low-k dielectric layer may be formed on the passivation layer. Data line routing structures may be formed on the first low-k dielectric layer. A second low-k dielectric layer may be formed on the first low-k dielectric layer. A common voltage electrode and associated storage capacitance may be formed on the second low-k dielectric layer. The first and second low-k dielectric layers may be formed from material having substantially similar refractive indices to maximize backlight transmittance and may have appropriate thicknesses so as to minimize parasitic capacitive loading.

Display circuitry with improved transmittance and reduced coupling capacitance

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Los Altos, CA, United States of America

Shang-Chih Lin