Intel Corporation

Shaman Narayana

Rajesh M Sankaran

Ren Wang

Jr-Shian Tsai

Sameh Gobriel

Narayan Ranganathan

Edwin Verplanke

Nilesh K Jain

Brinda Ganesh

Yipeng Wang

Somnath Paul

Mrittika Ganguli

Abhirupa Layek

Sriram Kabisthalam Muthukumar

Abhijit Davare

Priya Autee

Anton Alexandrovich Sorokin

Desmond A Kirkpatrick

Suvadeep Banerjee

Jaykant B Timbadiya

Nalini Murari

Examples described herein relate to offload circuitry comprising one or more compute engines that are configurable to perform a workload offloaded from a process executed by a processor based on a descriptor particular to the workload. In some examples, the offload circuitry is configurable to perform the workload, among multiple different workloads. In some examples, the multiple different workloads include one or more of: data transformation (DT) for data format conversion, Locality Sensitive Hashing (LSH) for neural network (NN), similarity search, sparse general matrix-matrix multiplication (SpGEMM) acceleration of hash based sparse matrix multiplication, data encode, data decode, or embedding lookup.

Hardware offload circuitry

Growing community of inventors

Chandler, AZ, United States of America

Shaman Narayana