Cypress Semiconductor Corporation

Shailja Garg

Anup Nayak

Derwin W Mattos

Nicholas Alexander Bodnaruk

Sanjay K Sancheti

USB physical interface subsystems are provided that include a protection circuit including a power supply interface and a plurality of pin interfaces, a pin identifier circuit in communication with the protection circuit for detecting a device coupling to a pin connected to one pin interface of the plurality of pin interfaces, a USB physical interface, and a dual power supply regulator configured to receive power via the power supply interface, to continuously supply a first voltage to the protection circuit, and to provide a second voltage and a third voltage to the pin identifier circuit and the USB physical interface, the second voltage and the third voltage being switched outputs.

Low power USB 2.0 subsystem

A configurable power controller and method for controlling power of a macro circuit block, such as a memory circuit, in multiple power modes is described to help minimize power consumption of the macro circuit block when the application environment for the macro circuit block is in a lower power mode than during its normal power mode.

Growing community of inventors

Fremont, CA, United States of America

Shailja Garg