Texas Instruments Corporation

Shaibal Barua

Sumanth Somashekar

Padman Sooryamoorthy

William Robert Krenik

Roy Clifton Jones, Iii

Lily Springer

David R Cotton

Edward N Jeffrey

Dennis V Hahn

James Garrett Homack

Wen-Hwa M Chu

A layout file for an integrated circuit has drawn geometries. Variable fill geometries are added to local areas based on densities of the drawn geometries in windows associated with the local areas and on the global density of all the drawn geometries in the layout file. Each window has a separate local area associated with it. The densities of the variable fill geometries in the local areas are not all equal. Densities of the fill geometries are higher in local areas associated with windows having lower densities of the drawn geometries, and for lower values of the global density. The layout file is stored in a computer-readable medium which may be used to produce a photomask for manufacturing an integrated circuit.

Aware variable fill pattern generator

A layout file for an integrated circuit has drawn geometries. Variable fill geometries are added to local areas based on densities of the drawn geometries in windows associated with the local areas and on the global density of all the drawn geometries in the layout file. Each window has a separate local area associated with it. The densities of the variable fill geometries in the local areas are not all equal. Densities of the fill geometries are higher in local areas associated with windows having lower densities of the drawn geometries, and for lower values of the global density. The layout file is stored in a computer-readable medium.

A method of verifying consistency between a circuit schematic and a corresponding integrated circuit layout is disclosed. The method includes identifying a voltage condition associated with a portion of the circuit schematic, and assigning a pseudo diode to the portion of the circuit schematic that is uniquely associated with the identified voltage condition. The method further includes coding a pseudo layer associated with an integrated circuit layout of the circuit schematic in accordance with content of the assigned pseudo diode, and verifying consistency between the circuit schematic and the corresponding integrated circuit layout by extracting the pseudo layer from the integrated circuit layout and comparing information of the pseudo layer to the assigned pseudo diode in the circuit schematic.

Verification method with the implementation of well voltage pseudo diodes

A circuit and method for braking a disk drive when a power fault occurs has a circuit (,) for producing an output signal (,) indicating that the motor of the disk drive has slowed at least to a predetermined rotational speed after the occurrence of the power fault. The components of the circuit (,) may be integrated onto the same integrated circuit as the motor driving circuitry or head retract circuitry. During the time between the occurrence of the power fault and the time the disk drive has slowed to the predetermined rotational speed, the read/write head mechanism (,) is retracted. A braking circuit then brakes the disk drive when the output signal (,) indicates that the motor has slowed, at least to the predetermined rotational speed. The circuit for producing an output signal indicating that the motor has slowed at least to the predetermined rotational speed is actuated by the back-emf (,) generated by the motor failing below a predetermined level.

Method and apparatus for braking a polyphase DC motor

A system for driving hard disk drive spindle and actuator motors is disclosed. The system comprises a spindle motor control circuit (120), a spindle motor power circuit (210), an actuator motor control circuit (110), and an actuator motor power circuit (210). The spindle motor control circuit (120) and the actuator motor control circuit (110) are formed on a first substrate (100). The spindle motor power circuit (210) and the actuator motor power circuit (220) are formed on a second substrate (200). The system also includes at least one disk (22) attached to a rotatable spindle (21), a spindle motor (400) for receiving and being energized by the spindle motor power signals, and for controlling the rotation of the spindle (21), a plurality of disk read heads (12) adjacent to the disks (22), and an actuator motor (300) for receiving and being energized by the actuator motor power signals, and for controlling the position of the disk read heads (12).

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Allen, TX, United States of America

Shaibal Barua