Planar Systems, Inc.

Shahnad Nadershahi

A clock synthesis circuit and method provides for precision controlling and programming a selected number of clock pulses (or simply 'clocks') fitted within time periods between two consecutive pulses of a so-called system heartbeat (SHB) timing signal. The disclosed embodiments have applicability in light emitting diode (LED) display driver integrated circuits (ICs) and, more generally, digital circuits including computer processors, microcontrollers, logic devices such as field-programmable gate arrays (FP-GA), and other logic circuitry.

Clock synthesis circuitry and associated techniques for generating clock signals refreshing display screen content

Active discharge circuitry for fast discharging of charge on an LED display matrix includes a mechanism to effectuate circuit path switching so as to electrically connect a charged node to a discharge circuit for controlled discharging of unwanted charge until it reaches a desired (e.g., programmable) value. The active discharge circuitry includes a control circuit generating appropriate timing and digital control signals for starting and stopping (e.g., actuating a switch) the discharge activities. The disclosed techniques accommodate variations in channel-to-channel start times for mitigating ghosting effects that would otherwise be presented from the LED display matrix due to residual (i.e., unwanted) charges remaining electrically loaded on display elements via, for example, charged parasitic capacitance or other such transients, after a current driver of a specific channel has stopped driving.

Active discharge circuitry for display matrix

A current controller for an output stage of light emitting diode (LED) driver circuitry includes a current source establishing a nominal amount of current available for each member of the set of channels. The nominal amount of current is based on, e.g., a desired brightness level. Pulse width modulation (PWM) circuitry is electrically coupled to the current source and is configured to control durations in which adjusted amounts of current are applied to corresponding members the set of LEDs. Compensation circuitry is electrically coupled to the current source and the PWM circuitry. The compensation circuitry includes a set of switching elements to adjust, for each corresponding member of the set of LEDs, the nominal amount of current and thereby provide to the PWM circuitry the adjusted amounts of current based on feedback representing one or both load impedance variations and parasitic conditions (LIVPC) and process, voltage and temperature (PVT) conditions.

Current controller for output stage of LED driver circuitry

A circuit for driving at least one light emitting diode (LED) of a display based on a greyscale vector. The circuit includes brightness scale detection circuitry to determine a brightness value based on the greyscale vector and refresh cycle selection circuitry to output an indication of a subset of refresh cycles, referred to as dithered refresh cycles. The circuit also includes pulse width determination circuitry to define a pulse width based on the greyscale vector. Pulse adjustment control circuitry, for each dithered refresh cycle, determines a dithered pulse width by adjusting the pulse width by a width adjustment amount, and outputs a dithered pulse width modulation signal including a series of pulses including a pulse having the pulse width determined by the pulse width determination circuitry non-dithered refresh cycles and a pulse having the dithered pulse width for the dithered refresh cycles.

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Beaverton, OR, United States of America

Shahnad Nadershahi