General Electric Company

Lockheed Martin Corporation

Shabbir S Moochalla

Allen Katz

William Joseph Taft

Johan Ramirez

A method of fabricating a solid state power amplifier (SSPA) having variable output power is provided. The method includes coupling a first transistor device to a second transistor device and biasing a drain input of each of the first and second transistor device. Further, the method includes biasing a gate input of each of the first and second transistor device varying a drain to source current of each of the first and second transistor device to enable the SSPA to maintain high power added efficiency (PAE) and consistent linearity over a range of output power levels.

Microwave variable power solid state power amplifier (SSPA) with constant efficiency and linearity

A FET is operated without source-to-drain bias, with the source-to-drain conductive path coupled in series with a transmission line. A gate-to-ground impedance is selected in conjunction with a gate voltage near pinchoff to impress nonlinear distortion or gain and/or phase of signals traversing the source-to-drain conductive path. The nonlinear distortion can compensate for the amplitude distortion of a following amplifier, but the phase distortion may not be suitable for correcting that of the following amplifier. An inductor is bridged from source to drain, and corrects the phase without excessive effect on the amplitude. The magnitude of the inductor may be adjusted to minimize nonlinear amplitude change without affecting the phase change, whereupon the phase change may be made independent of amplitude change. A resistor in series with the bridging inductor can be selected to render amplitude change independent of phase change. Two such independent amplitude and phase correctors may be cascaded.

Wideband transmission-mode FET linearizer

A nonlinear processor for use as a signal limiter or predistortion equalizer includes a four-port, 3dB directional coupler. Signal to be distorted is applied to a first port of the coupler, and is coupled by second and third ports to a pair of nonlinear circuits. Each nonlinear circuit includes the source-to-drain transmission path of a FET. Each nonlinear circuit is grounded or short-circuited, to form a nonlinear reflective circuit which reflects the energy back to the associated port of the coupler. The nonlinearly reflected energy is received at the two coupler ports, and is combined and made available at the fourth coupler port. The input return loss of the processor is improved by matching the nonlinear circuits to each other.

Balanced reflective nonlinear processor using FETs

A distortion generator uses the source-to-drain conductive path of a FET as the nonlinear element, in either a reflective or transmissive mode. In the reflective mode, the signal is applied across the source-to-drain conductive path, and in the transmissive mode the source-to-drain conductive path is in series with the transmission path. The FET may be biased, and the gate impedance to reference potential aids in selecting the nonlinearity characteristic. Reflective embodiments of a predistortion equalizer include a circulator version and a 3 dB hybrid splitter version. Transmissive embodiments include a direct series embodiment, and another with a 3 dB splitter and a separator combiner. Limiter and log-amp uses are described.

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Kendall Park, NJ, United States of America

Shabbir S Moochalla