Stmicroelectronics S.a.

Sébastien Dedieu

Marc Houdebine

Frédéric Paillardet

Loïc Joet

Eric Andre

Daniel Saias

Jerome Lajoinie

Isabelle Telliez

Gérald Provins

A phase-locked loop circuit having a comparator that receives a target digital word representative of a non-integer target ratio between a main signal and a reference signal having a reference frequency. The circuit also includes digitally-controlled oscillator coupled to the comparator to deliver an output signal. One return loop is coupled between the output of the oscillator and the comparator. The latter includes a device to generate a digital word representing the non-integer ratio between the period of the reference signal and the period of the output signal, the reference signal and the output signal respectively corresponding to the first and second signal, and the fixed integer part N being equal to the integer part of the target non-integer ratio. The comparator compares the digital word and target digital word. The oscillator adjusts the frequency of the output signal as a function of the result delivered by the comparator.

Digital word representative of a non-integer ratio between the respective periods of two signals

A method in accordance with the invention may include a cyclical succession of measurement phases and of correction phases. The correction phase may include a deactivation of a frequency divider and a correction of the control of an oscillator on the basis of the error signal, with the output signal from the oscillator forming the desired signal.

Method and device for generating a signal by fractional frequency locked loop

A method for correcting the phase difference between two input signals of a phase-locked loop may include a charge pump connected to a filter. Prior to the occurrence of the first of the two input signals, a calibration phase may be carried out in which the input of the filter is disconnected from the output of the charge pump, the output voltage from the charge pump is equalized, to within a given error, with the input voltage of the filter, the amplitudes of the opposing currents flowing in the charge pump being equalized. Then, during the two respective occurrences of the two input signals, the input of the filter is reconnected to the output of the charge pump, and two phase-shifted signals that are delayed with respect to the input signals are respectively generated, in response to which the two opposing currents are, respectively and successively, interrupted, before the calibration phase is recommenced.

Method of correcting the phase difference between two input signals of a phase-locked loop and associated device

A method for generating a signal with a frequency equal to a product of a reference frequency and a real number includes providing an output signal from an oscillator, and performing a first integer division of a frequency of the output signal by a first integer divider to obtain a first intermediate signal. A first measurement signal representative of a time difference between the first intermediate signal and a reference signal having the reference frequency is determined. The method further includes generating a first comparison signal derived from the first measurement signal, and generating a second comparison signal dependent on a period of the reference signal, on integer and decimal parts of the real number and on the first integer divider. The first and second comparison signals are compared to obtain an error signal representative of a time difference between a period of a current output signal and the period of the reference signal. The first integer division is deactivated to deliver an error signal to the input of the oscillator, with the output signal from the oscillator forming the desired signal with a frequency equal to the product of the reference frequency and the real number.

Method and device for generating a signal with a frequency equal to the product of a reference frequency and a real number

At least a first base signal and a second base signal are mutually in quadrature and both are capable of mutually exhibiting a quadrature error. These signals are used to formulate two pairs of delayed signals that includes a first delayed signal that is delayed with respect to the first base signal, a second signal delayed in phase opposition with respect to the first delayed signal, a third signal delayed with respect to the second base signal, and a fourth delayed signal in phase opposition with respect to the third delayed signal. The value of each of the delays is continuously adjusted using two differential signals arising from a direct or an indirect cross-mixing of the two pairs of delayed signals to obtain the four delayed signals virtually in quadrature.

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Crolles, France

Sébastien Dedieu