Qualcomm Incorporated

Other

Seyfollah Seyfollahi Bazarjani

Guoqing Miao

Edward George Tiedemann, Jr

Tao Chen

Louis Dominic Oliveira

Saed G Younis

Sean Wang

Jonghae Kim

Shiqun Gu

Matthew Michael Nowak

Lew G Chua-Eoan

Jeremy Mark Goldblatt

Jeffrey Mark Hinrichs

Steven C Ciccarelli

Thomas R Toms

Brian Matthew Henderson

Xiaohong Quan

James Ian Jaffee

Joseph Robert Fitzgerald

Vincenzo Peluso

Uma Chilakapati

Haitao Zhang

Peter J Shah

Ankit Srivastava

Prajakt Kulkarni

Qiuzhen Zou

Brett Christopher Walker

Reza Jalilizeinali

Sanjay K Jha

Mustafa Keskin

Hui-Ya Liao Nelson

Xuhao Huang

Wenjun Su

Daniel Keyes Butterfield

Arash Mehrabi

Edward A Keehr

Justin Joseph Rosen Gagne

Gene Hyde McAllister

Edward G Tiedemann

Jan Paul Van Der Wagt

Khalid Junaid Sidiqi

Matt Sienko

Chuanyang Wang

Vincenzo Filip Andre Peluso

Anurag Pulincherry

Samir Kamar Gupta

Joseph R Fitzgerald

Prajakt V Kulkarni

Gene H Mcallister

Khalid J Sidiqi

Joseph Fitzgerald

A user device determines whether a device connected to its headset jack is an audio accessory device. If the device connected to the headset jack is an audio accessory, the user device connects one or more pins of the headset jack to an audio codec. If the device plugged into the headset jack is not an audio accessory device, the user device connects one or more pins of the headset jack to alternate circuitry. The user device then determines, through the alternate circuitry, an electrical operating parameter requirement of the accessory device, and provides, from the alternate circuitry, the required operating parameter to the accessory device through the headset jack. The alternate circuitry may include an adjustable voltage regulator and/or an adjustable current regulator and the required operating parameter may be one or more of a voltage supply and a current supply.

Electronics interface for device headset jack

An apparatus for sharing a serial communication port between a plurality of communication channels is described. The apparatus comprises a transceiver that manages communications over the serial communication port. The apparatus also includes a multiplexer coupled to the transceiver, wherein the multiplexer multiplexes the plurality of communication channels. The apparatus also includes identification information circuitry coupled to the multiplexer, wherein the identification information circuitry adds identification information to data from the plurality of communication channels that enables the plurality of communication channels to share the serial communication port. The serial communications port and the multiplexer permit communication between integrated circuits that meet at least one latency metric for the plurality of communication channels when the plurality of communication channels are active.

Systems and methods for sharing a serial communication port between a plurality of communication channels

A system and method of improving the efficiency in the power consumption of an audio system. In essence, the technique is to adjust the power delivered from the power supply to the analog section, such as the power amplifier, in response to the volume level indicated by the volume control module and/or in response to the detected characteristic of the input audio signal. Thus, in this manner, the analog section is operated in a manner that is related to the level of the signal it is processing. Additionally, the system and method also relate to a technique of adjusting the dynamic ranges of the digital signal and the analog signal to improve the overall dynamic range of the system without needing to consume additional power.

System and method of reducing power consumption for audio playback

Techniques for removing crosstalk from a system, e.g., an audio system, having first and second (e.g., left and right) channels. In an aspect, first and second output voltages of corresponding first and second amplifiers are sampled during a calibration mode, in which one of the amplifiers is driven with a reference voltage, and the output of the other of the amplifiers is configured to have a high impedance. The sampled first and second output voltages may be digitized for processing by a processor to estimate a crosstalk removal function. The crosstalk removal function may then be multiplied with the input signals and added in a cross-channel manner to the first and second input signals prior to amplification to remove crosstalk from the system. In certain aspects, multiple reference voltages may be applied during the calibration mode to improve the estimate of the crosstalk removal function.

Channel crosstalk removal

A multi-mode amplifier with configurable DC-coupled or AC-coupled output is described. In one design, the multi-mode amplifier includes an amplifier and at least one DC level shifting circuit. The amplifier receives and amplifies an input signal and provides an output signal that is suitable for DC coupling to a load in a DC-coupled mode and for AC coupling to the load in an AC-coupled mode. The at least one DC level shifting circuit performs DC level shifting for at least one (e.g., input and/or output) common-mode voltage of the amplifier and is controlled based on whether the amplifier is operating in the DC-coupled or AC-coupled mode. The amplifier operates between Vand Vsupplies in the DC-coupled mode and between Vand Vsupplies in the AC-coupled mode. The amplifier may include at least one gain stage, an internal DC level shifting circuit, and an output stage.

Amplifier with configurable DC-coupled or AC-coupled output

Power consumption of electronic components is reduced, particularly in a multi-chip package. Embodiments reduce parasitic capacitance of a semiconductor chip by reducing ESD protection circuitry that is not needed during operation of the package. ESD protection circuitry would be operational during production and/or testing of the chip, but some circuitry would be disabled or removed prior to normal operation of the multi-chip package.

Die-to-die power consumption optimization

A three dimensional on-chip radio frequency amplifier is disclosed that includes first and second transformers and a first transistor. The first transformer includes first and second inductively coupled inductors. The second transformer includes third and fourth inductively coupled inductors. Each inductor includes multiple first segments in a first metal layer; multiple second segments in a second metal layer; first and second inputs, and multiple through vias coupling the first and second segments to form a continuous path between the first and second inputs. The first input of the first inductor is coupled to an amplifier input; the first input of the second inductor is coupled to the first transistor gate; the first input of the third inductor is coupled to the first transistor drain, the first input of the fourth inductor is coupled to an amplifier output. The second inductor inputs and the first transistor source are coupled to ground.

Three dimensional inductor, transformer and radio frequency amplifier

A digital offset is combined with an audio signal in the digital domain to cancel an output offset caused by one or more analog components processing the same audio signal. In this manner, the offset at the output of the audio signal path (e.g., at a power amplifier output) is reduced or eliminated. Consequently, audible artifacts, such as click-and-pop artifacts, can be reduced or eliminated. In audio devices operating in ground-referenced capless mode, power consumption is reduced because of reduced or eliminated direct current (DC) leakage current through speakers or headsets of such audio devices. In some circumstances, the digital offset in the digital domain may be applied at substantially all times of operation of the audio signal path.

Suppressing output offset in an audio device

The present invention encompasses a mobile station comprising a transmitter for transmitting outgoing signals from the mobile station and a receiver for receiving incoming signals, the receiver coupled to the transmitter and having N subreceivers, where N is an integer greater than one and each of the N subreceivers may independently be tuned to a desired frequency. The present invention also encompasses a wireless communication system comprising a plurality of base stations, where each of the base stations transmits signals on at least one of a plurality of frequencies and a plurality of mobile stations, at least one of the plurality of mobile stations comprises a transmitter for transmitting signals to at least one of the plurality of base stations and a receiver coupled to the transmitter for receiving signals from at least one of the plurality of base stations, the receiver having N subreceivers, where N is an integer greater than one and each of the N subreceivers is independently tuned to a desired frequency.

Candidate system search and soft handoff between frequencies in a multi-carrier mobile communication system

An improved power amplifier system is provided. The power amplifier system includes a programmable digital filter and a power amplifier, each responsive to a plurality of frequency response settings and switching frequency settings, respectively. Each frequency response setting and switching frequency setting is adaptively selected by a processor device to match a bandwidth of an incoming audio signal. The processor device identifies the current bandwidth of an incoming audio signal and adaptively selects a switching rate setting and a frequency response setting based on the current bandwidth. The frequency response setting is selected so as to reduce noise fold over in the power amplifier for a corresponding bandwidth, sampling rate setting, and switching frequency setting.

Digital filtering in a Class D amplifier system to reduce noise fold over

A three dimensional on-chip inductor, transformer and radio frequency amplifier are disclosed. The radio frequency amplifier includes a pair of transformers and a transistor. The transformers include at least two inductively coupled inductors. The inductors include a plurality of segments of a first metal layer, a plurality of segments of a second metal layer, a first inductor input, a second inductor input, and a plurality of through silicon vias coupling the plurality of segments of the first metal layer and the plurality of segments of the second metal layer to form a continuous, non-intersecting path between the first inductor input and the second inductor input. The inductors can have a symmetric or asymmetric geometry. The first metal layer can be a metal layer in the back-end-of-line section of the chip. The second metal layer can be located in the redistributed design layer of the chip.

Three dimensional inductor and transformer

An integrated audio transducer with associated signal processing electronics is disclosed. A silicon audio transducer, such as a MEMS microphone or speaker, can be integrated with audio processing electronics in a single package. The audio processing electronics can be configured using control signals. The audio processing electronics can provide a single line serial data interface and a single line control interface. The audio transducers can be integrated with associated processing electronics. A silicon microphone can be integrated with an Analog to Digital Converter (ADC). The ADC output can be a single line serial interface. The ADC can be configured using a single line serial control interface. A speaker may be integrated with a Digital to Analog Converter (DAC). Audio transducers can also be integrated with more complex processing electronics. Audio processing parameters such as gain, dynamic range, and filter characteristics may be configured using the serial interface.

Integrated audio codec with silicon audio transducer

Complimentary Metal-Oxide-Semiconductor (CMOS) circuits made with core transistors are capable of reliable operation from an IO power supply with voltage that exceeds the reliability limit of the transistors. In embodiments, biasing of an operational amplifier is changed in part to a fixed voltage corresponding to the reliability limit. In embodiments, switched capacitor networks are made with one or more amplifiers and switches including core transistors, but without exposing the core transistors to voltages in excess of their reliability limit. In embodiments, operational transconductance amplifiers (OTAs) include core transistors and operate from IO power supplies. Level shifters for shifting the levels of a power down signal may be used to avoid excessive voltage stress of the OTAs' core transistors during turn-off. Non-level shifting means may be used to clamp output voltages and selected internal voltages of the OTAs, also avoiding excessive voltage stress of the core transistors during turn-off.

Metal-oxide-semiconductor circuit designs and methods for operating same

Techniques for adaptively generating bias current for a switched-capacitor circuit are described. The switched-capacitor circuit charges and discharges at least one switching capacitor at a sampling rate and may be a &#x3a3;&#x394; ADC that digitizes an analog signal at the sampling rate and provides digital samples. The switched-capacitor circuit may support multiple modes associated with different sampling rates. A bias circuit generates a bias current for the switched-capacitor circuit to be proportional to the sampling rate for a selected mode, to provide a bandwidth proportional to the sampling rate for an operational transconductance amplifier (OTA) within the switched-capacitor circuit, and to track changes in the switching capacitor(s) due to variations in integrated circuit (IC) process and temperature. The settling time of the switched-capacitor circuit may track with the multiple modes and across IC process and temperature variations.

Adaptive bias current generation for switched-capacitor circuits

Techniques for processing incoming signals conforming to a plurality of standards or communication formats with a single baseband receive section are disclosed. In one aspect, a plurality of analog processing components are adjusted in response to a format select signal, set according to one of a plurality of supported formats or standards. In another aspect, the operating mode of an A/D converter is tuned in response to the format select signal. In yet another aspect, the response characteristics of a jammer filter are tuned in response to the format select signal. In yet another aspect, the adjustment of the plurality of analog processing components is carried out by varying the frequency of a sample clock in response to the format select signal. Various other aspects are also presented. These aspects have the benefit of allowing a single baseband receive section to be deployed to process analog signals conforming to a plurality of communications standards or formats, in a power and area efficient manner.

Multi-standard baseband receiver

Growing community of inventors

San Diego, CA, United States of America

Seyfollah Seyfollahi Bazarjani