Samsung Electronics Co., Ltd.

Korea Advanced Institute of Science and Technology

Seungyeob Baek

Michael Choi

Miyoung Kim

Seung-Tak Ryu

Hyochul Shin

Jaekeun Lee

Sungno Lee

Heechang Hwang

Hyungjong Ko

Ilhoon Jang

Min-Jae Seo

An analog-to-digital conversion circuit includes; a first analog-to-digital converter (ADC), a second ADC and a third ADC collectively configured to perform conversion operations according to a time-interleaving technique, and a timing calibration circuit configured to calculate correlation values and determine differences between the correlation values using first samples generated by the first ADC, second samples generated by the second ADC, and third samples generated by the third ADC during sampling periods, wherein the timing calibration circuit is further configured to control a phase of a clock signal applied to the second ADC in response to a change in absolute value related to the differences generated during the sampling periods.

Analog-to-digital conversion circuit and receiver including same

An electronic circuit includes an analog to digital converter (ADC) and a noise coupling filter. The ADC generates a digital output signal based on a first analog signal and a second analog signal. The noise coupling filter generates the second analog signal to be fed back for an input to the ADC, based on a first quantization error signal associated with converting the first analog signal to the digital output signal. The noise coupling filter performs noise shaping on a digital error signal derived from the quantization error signal and generates the second analog signal from a result of the noise shaping, using a clock in the digital domain.

Electronic circuit for implementing modulator configured to perform noise shaping in digital domain

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Suwon-si, South Korea

Seungyeob Baek