Samsung Electronics Co., Ltd.

Skhynix Inc.

Korea Advanced Institute of Science and Technology

Seoul National University

Seungwook Lee

Hyung-Dal Kwon

Hanmin Park

Jae-Eon Jo

Jinyoung Park

JungChak Ahn

Youngnam Hwang

Haewon Lee

Jaehyeong Sim

Hyungdal Kwon

Byoungik Kang

Heesub Shin

Youngwoo Jung

Mihye Kim

Jiwon Park

Junbum Shin

Hyoun-Jee Ha

Hansu Cho

Brent ByungHoon Kang

Seungbeom Lee

Kwanyoung Oh

Donghyuk Park

Keongho Lee

Joongbaik Kim

Yunheung Paek

Chunmok Chung

Hyunki Seong

Chanyoung Jung

David Hyunchul Shim

An image sensor includes a first floating diffusion region, a second floating diffusion region adjacent to the first floating diffusion region in a first direction, a third floating diffusion region adjacent to the first floating diffusion region in a second direction that is perpendicular to the first direction and a fourth floating diffusion region adjacent to the second floating diffusion region in the second direction. A pad is disposed on the first and second floating diffusion regions. The pad at least partially overlaps the first and second floating diffusion regions. The image sensor includes an interconnection line and a first contact connecting the pad to the interconnection line. A first surface of the pad is disposed on the first floating diffusion region and the second floating diffusion region. A device isolation pattern defines the first, second, third and fourth floating diffusion regions.

Image sensor

An image sensor includes a substrate that includes first and second surfaces that oppose each other in a first direction and pixel areas arranged in directions parallel to the first surface, a first device isolation film that separates the pixel areas, four photodiodes disposed in each of the pixel areas inside of the substrate, and arranged in a 2×2 array, a second device isolation film that separates the four photodiodes from each other, a color filter disposed on the first surface of the substrate, and that includes four regions that respectively correspond to the four photodiodes, wherein each region has a convex upper surface, and a first microlens disposed above the color filter and that corresponds to each of the pixel areas. Accordingly, in the image sensor, light incident on the internal device isolation film is reduced, and loss of autofocusing sensitivity of the image sensor is reduced.

Image sensor with color filters with convex surfaces

Image sensors may include a base substrate including a substrate layer, a buried insulation layer on the substrate layer, and a semiconductor layer on the buried insulation layer, a photo sensing device in the substrate layer, a buried impurity region spaced apart from the photo sensing device in an upper portion of the substrate layer, a transfer gate including a vertical gate extending through the semiconductor layer and the buried insulation layer and extending into an inner portion of the substrate layer, which is between the photo sensing device and the buried impurity region, a planar gate on the semiconductor layer, and a gate insulation layer between the substrate layer and the planar gate.

Image sensors

An accelerator, a method of operating the accelerator, and an electronic device including the accelerator. A method of operating the accelerator configured to perform a target operation includes packing input data with a data layout determined based on a word width of a memory in the accelerator and a spatial size of a filter to be applied to the target operation and storing the packed input data in the memory, and performing the target operation between a portion of the input data stored in a same word in the memory and weights of the filter.

Accelerator, method of operating an accelerator, and electronic device including an accelerator

An autonomous driving device includes an execution network configured to determine a target speed of a driving vehicle according to state information history including a plurality of state information for road environment. The plurality of state information are generated at a plurality of times. The execution network includes a spatial attention network configured to receive the state information history and to generate feature data reflecting spatial importance based on the state information history; and a temporal attention network configured to determine the target speed of the driving vehicle by applying temporal importance to an output of the spatial attention network.

Autonomous driving device

An image sensor includes a substrate having a first surface and a second surface, which are opposite to each other, the substrate including a unit pixel region including a device isolation pattern adjacent to the first surface and a photoelectric conversion region adjacent to the second surface, a pixel isolation pattern provided in the substrate to define the unit pixel regions, an impurity region in the unit pixel region and being adjacent to a side surface of the device isolation pattern, a gate electrode provided on the first surface, and an auxiliary isolation pattern provided between a first side surface of the gate electrode and the impurity region, when the image sensor is viewed in a plan view. A bottom surface of the auxiliary isolation pattern may be located at a level different from a bottom surface of the device isolation pattern.

An electronic system and an operation method thereof are disclosed. A method of an electronic system including a field programmable gate array (FPGA) includes: synthesizing, by processing circuitry, code of a high level language into code of a hardware description language; designing, by the processing circuitry, a circuit of an intellectual property (IP) block included in the field programmable gate array according to the code of the hardware description language; and generating, by the processing circuitry, a database containing reference assembly code corresponding to the code of the high level language and information about a circuit configuration of the intellectual property block.

Electronic system including FPGA and operation method thereof

Disclosed is an apparatus and method for performing deep learning operations. The apparatus includes a systolic array comprising multiplier accumulator (MAC) units, and a control circuit configured to control an operation of a multiplexer connected to at least one of the MAC units and operations of the MAC units according to a plurality of operation modes.

Method and apparatus for performing deep learning operations

Disclosed are a memory compression method of an electronic device and an apparatus thereof. The method for compressing memory in an electronic device may include: detecting a request for executing the first application; determining whether or not the memory compression is required for the execution of the first application; when the memory compression is required, compressing the memory corresponding to an application in progress in the background of the electronic device; and executing the first application.

Memory compression method of electronic device and apparatus thereof

A method for controlling a memory operation includes determining a number of commands for each memory address based on information of requests stored in an interface buffer and a scheduler buffer, determining a control state of the memory operation according to a command type with a largest number of commands, and determining types of a request transmitted to the scheduler buffer from the interface buffer and a request output from the scheduler buffer according to a control state of the memory operation. Other embodiments including an apparatus for controlling a memory are also disclosed.

Method and apparatus for controlling memory operation

Provided is a method of memory access for a memory controller in an integrity monitoring system sharing memory with a host system. The memory access method may include: receiving a memory access command from a local processor of the integrity monitoring system; accessing a system memory of the host system according to the memory access command; receiving data corresponding to the memory access command from the host system; and forwarding the received data to the local processor, wherein the system memory includes a secure area, access to which is allowed when the memory controller receives a memory access command from the local processor. In a feature of the present invention, there are provided a method and apparatus that can monitor integrity of data processed in the host system in a SoC environment.

Method and device for monitoring data integrity in shared memory environment

A complementary metal-oxide-semiconductor (CMOS) image sensor is provided. The CMOS image sensor may include an epitaxial layer having a first conductivity type and having first and second surfaces, a first device isolation layer extending from the first surface to the second surface to define first and second pixel regions, a well impurity layer of a second conductivity type formed adjacent to the first surface and formed in the epitaxial layer of each of the first and second pixel regions, and a second device isolation layer formed in the well impurity layer in each of the first and second pixel regions to define first and second active portions spaced apart from each other in each of the first and second pixel regions.

Growing community of inventors

Seoul, South Korea

Seungwook Lee