Boe Technology Group Co., Ltd.

Beijing Boe Display Technology Co., Ltd.

Chengdu Boe Optoelectronics Technology Co., Ltd.

Chongqing Boe Optoelectronics Technology Co., Ltd.

Hefei Boe Display Technology Co., Ltd.

Beijing Boe Display Technology Technology Co., Ltd

Seungmin Lee

Yanping Liao

Xibin Shao

Zhihua Sun

Yingmeng Miao

Qiujie Su

Dongchuan Chen

Feng Qu

Dan Wang

Cong Wang

Yingying Qu

Jiantao Liu

Honglin Zhang

Shulin Yao

Yinlong Zhang

Hebin Zhao

Xu Zhang

Lei Guo

Xiaofeng Yin

Liangliang Jiang

Bin Zou

Weichao Ma

Changcheng Liu

Jing Li

Zhe Li

Tao Yang

Feng Zhao

Feifei Wang

Ting Dong

Xiaoyuan Wang

Jianming Wang

Yutao Hao

Lifeng Lin

Junjie Guo

Yifu Chen

Baoyu Liu

Lingdan Bo

Lan Xin

Wei Zhang

Xin Zhou

Ke Dai

Peng Li

Li Tian

Yi Liu

Bochang Wang

Sha Liu

Jian Yang

Yajie Bai

Yujie Gao

Wu Wang

Yue Yang

Kai Diao

Haijun Shi

Yan Fang

Chongyang Zhao

Ruilin Bi

Jianhua Huang

Zhihao Zhang

Heng Li

Benzhi Xu

Xipeng Wang

Zhenrui Fan

Hongguang Yuan

Hongli Yue

Wenxuan Zhang

Beum Ku Park

Changchen Liu

Dong Liu

Li Xiong

There is provided a gate driving circuit, a display panel and a driving method of the gate driving circuit. The gate driving circuit includes multiple stages of shift registers. The multiple stages of shift registers comprise N first shift registers arranged alternately with N second shift registers. The N first shift registers are cascaded-coupled as N stages of first shift registers, and are configured to generate N first output signals under control of K first clock signals. The N second shift registers are cascaded-coupled as N stages of second shift registers, and are configured to generate N second output signals under a control of K second clock signals. K and N are both integers greater than 1, and K≤N.

Gate driving circuit and driving method thereof and display panel

The present disclosure provides a display panel driving method, a display panel and a display device, the method comprising: comprising alternately configure display time periods and touch time periods in one time frame, at least one touch time period being configured, and at least two display time periods being configured; sequentially scanning in each display time period a portion of gate lines in a display panel; and pausing in each touch time period the scanning of all gate lines, and performing touch recognition, wherein in a display time period adjacent to a touch time period, level compensation is performed on a gate line to be compensated, and the gate line to be compensated is at least one gate line that starts to scan in the display time period adjacent to the touch time period.

Driving method for display panel, display panel, and display device configured with time frame comprising at least two display time periods and at least one touch time period which are alternately configured

The disclosure provides a display device and a holographic display apparatus. The display device includes a display panel including a first linear polarizer located on a light-emitting side, so that the display panel emits linearly polarized image light; and a phase modulation panel disposed on the light-emitting side of the display panel and configured to perform phase modulation on the linearly polarized image light. The holographic display apparatus includes the display device.

Display device and holographic display apparatus

An array substrate and a display device are provided. The array substrate includes a base substrate, a plurality of data lines extending along a first direction and a plurality of gate lines extending along a second direction, and a plurality of pixel units defined by the gate lines and the data lines. The pixel unit includes a thin-film transistor, a common electrode and a pixel electrode. The thin-film transistor includes a gate electrode, a source and drain electrode and an active layer. The pixel unit also includes a first auxiliary electrode and a second auxiliary electrode. The first auxiliary electrode is electrically connected to the common electrode, and the second auxiliary electrode is electrically connected to the source and drain electrode. An orthographic projection of the first auxiliary electrode on the base substrate at least partially overlaps an orthographic projection of the second auxiliary electrode on the base substrate.

Array substrate comprising first and second auxiliary electrodes, and display device

An array substrate, including: a base substrate, and a plurality of first signal lines, a plurality of second signal lines, a plurality of touch-control signal lines, a first transparent conductive layer and a second transparent conductive layer, which are arranged on the base substrate. The first transparent conductive layer and the second transparent conductive layer are located on the side of the touch-control signal lines that is away from the base substrate. The touch-control signal lines are connected to at least one touch-control sensing block, which includes a plurality of touch-control electrodes connected to each other and spaced apart from each other; and the first transparent conductive layer or the second transparent conductive layer includes the plurality of touch-control electrodes. The plurality of first signal lines and the plurality of second signal lines intersect to form a plurality of sub-pixel regions, which include opening regions.

Array substrate and preparation method therefor, and touch-control display apparatus

The present disclosure provides a display panel and a manufacturing method therefor, and a display apparatus, which relate to the technical field of displaying. The display panel includes a first base plate and a second base plate which are aligned with each other; the first base plate includes a first substrate and a thin film transistor; the thin film transistor includes an active layer; an optical adjustment layer is disposed on the second base plate; an orthographic projection of the optical adjustment layer on the first substrate overlaps with an orthographic projection of the active layer on the first substrate. That is, the optical adjustment layer corresponds to the active layer. In a laminating direction of the display panel, the existence of the optical adjustment layer with a certain height enables a reflecting surface of the second base plate to be closer to the first base plate.

Display panel and manufacturing method therefor, and display apparatus

A display panel, a driving method for the display panel and a display device. The display panel includes a gate driving circuit, the gate driving circuit includes shift registers of a plurality of stages arranged in sequence, the shift registers of the plurality of stages arranged in sequence are combined into N groups of gate driving sub-circuits, and shift registers in the N groups of gate driving sub-circuits are cascaded, respectively; an m-th group of gate driving sub-circuits in the N groups of gate driving sub-circuits comprises a shift register of an m-th stage and a shift register of an (m+L*N)th stage that are cascaded, where m is an integer that is greater than or equal to 1 and less than or equal to N, L is an integer that is greater than or equal to 1, N is an even number that is greater than or equal to 2.

Display panel, driving method for the display panel and display device

At least one chip group and a group of first PLG wirings corresponding to each of the chip groups are disposed in a first bonding area, each of the chip groups includes at least two groups of chip units, each group of the chip units includes at least one gate drive chip, each group of the first PLG wirings includes a first wiring and at least one second wiring; power pins of any two adjacent gate drive chips are connected by the first wiring, each of the second wirings surrounds and passes through each of the gate drive chips, the first wirings connected with the power pin of the last gate drive chip in the previous group of the chip units and any of the second wirings, are parallelly connected with the power pin of the first gate drive chip in the next group of the chip units.

Display module having low difference in pixel luminance and display apparatus

A display panel and a display device are disclosed. The display panel comprises an array substrate and spacers; the array substrate comprises a first substrate, gate lines, data lines, and multiple sub-pixel units; the first substrate is provided with multiple sub-pixel regions, first wiring regions each located between two adjacent rows of sub-pixel regions, and second wiring regions each located between two adjacent columns of sub-pixel regions and intersecting the first wiring regions; at least part of each sub-pixel unit is located on a sub-pixel region; the gate lines and the data lines are respectively located on the first wiring regions and the second wiring regions and are electrically connected to the sub-pixel units; the data lines and the gate lines are insulated from each other and intersect each other; each data line is provided with an alignment part.

Display panel and display device

A dual gate array substrate includes a plurality of groups of dual gate lines, a plurality of data lines, a plurality of pixel pairs and a plurality of common electrode lines, each common electrode line is arranged between two pixel units in a same pixel pair; and a layer where the common electrode line is located and a layer where a source/drain electrode of a thin film transistor is located are different layers and insulated from each other.

Dual gate array substrate and display panel

The present disclosure relates to an array substrate and a display device. The array substrate may include: a first substrate, and a plurality of pixel groups and a plurality of columns of data lines formed on the first substrate; wherein the plurality of pixel groups are arranged in an array along a row direction and a column direction, and each pixel group includes two sub-pixels arranged in the row direction; at least one sub-pixel of one of any two adjacent pixel groups in the row direction corresponds to the same color as one sub-pixel of the other pixel group; and any two adjacent sub-pixels in the row direction correspond to different colors; and each column of data line and each column of pixel groups are alternately arranged in the row direction.

Array substrate and display device

A display device and a method for bonding the display device are provided. The display device includes a display panel and a plurality of chip on films. The plurality of chip on films are arranged along a first edge of the display panel, and are divided into a plurality of groups of chip on films, and each group of chip on films includes at least two chip on films, and is bonded to the display panel through a same anisotropic conductive film.

Display device and method for bonding the same

There is provided a gate driving circuit comprising N first shift registers arranged alternately with N second shift registers. An input signal terminal of an n-th stage of first shift register is coupled to an output signal terminal of an (n−i)-th stage of first shift register, and a reset signal terminal of the n-th stage of first shift register is coupled to an output signal terminal of an (n+j)-th stage of first shift register. Input signal terminal and reset signal terminal of n-th stage of second shift register are coupled to output signal terminals of (n−i)-th and (n+j)-th stages of second shift registers respectively. K=6, i=3, and j=4. Reset signal terminals of (N−j+1)-th to N-th stages of first shift registers and reset signal terminals of (N−j+1)-th to N-th stages of second shift registers are configured to receive a total reset signal.

A gate driving circuit is provided, including N-stages of cascaded shift registers divided into at least one group of K-stages in which a clock signal terminal of a k-th stage of shift register is connected to receive a k-th clock signal, where 1≤k≤K≤N; and an input signal terminal of a n-th stage is connected to an output signal terminal of a (n−i)-th stage, and reset signal terminals of the n-th and (n+1)-th stages are connected to an output signal terminal of a (n+j)-th stage, where 1<n<N, (K−2)/2≤i≤K/2, and K/2<j≤K−2. K=12, the input signal terminal of the n-th stage is connected to an output signal terminal of a (n−6)-th stage, and the reset signal terminals of the n-th stage and the (n+1)-th stage are connected to an output signal terminal of a (n+8)-th stage or a (n+10) stage.

Gate driving circuit, method for driving gate driving circuit and display panel

A display driving method, a display driving device and a display device are provided. The display driving method includes: when displaying an odd-numbered frame, providing first parity row data of the odd-numbered frame to a display array, to enable a third parity row of the display array to be displayed based on real data of the first parity row data and enable a fourth parity row of the display array to be displayed based on interpolation data of the first parity row data; and when displaying an even-numbered frame, providing second parity row data of the even-numbered frame to the display array, to enable the fourth parity row of the display array to be displayed based on real data of the second parity row data and enable the third parity row of the display array to be displayed based on interpolation data of the second parity row data.

Display driving method, display driving device, and display device

Growing community of inventors

Beijing, China

Seungmin Lee